240Pin DDR3L 1600 UDIMM 2GB Based on 256Mx8 AQD-D3L2GN16-SQ Advantech AQD-D3L2GN16-SQ Datasheet Rev. 2.0 2014-10-20 1 240Pin DDR3L 1600 UDIMM 2GB Based on 256Mx8 AQD-D3L2GN16-SQ Description Pin Identification Pin Identification DDR3L Unbuffered DIMM is high-speed, low power Symbol Function memory module that use 256Mx8bits DDR3L SDRAM in FBGA package and a 2048 bits serial EEPROM on a A0~A14, BA0~BA2 Address/Bank input 240-pin printed circuit board. DDR3L Unbuffered DIMM is DQ0~DQ63 Bi-direction data bus. a Dual In-Line Memory Module and is intended for DQS0~DQS7 Data strobes mounting into 240-pin edge connector sockets. /DQS0~/DQS7 Differential Data strobes Synchronous design allows precise cycle control with the CK0, /CK0,CK1, /CK1 Clock Input. (Differential pair) use of system clock. Data I/O transactions are possible CKE0, CKE1 Clock Enable Input. on both edges of DQS. Range of operation frequencies, ODT0, ODT1 On-die termination control line programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance /S0, /S1 DIMM rank select lines. memory system applications. /RAS Row address strobe /CAS Column address strobe Features /WE Write Enable RoHS compliant products. DM0~DM7 Data masks/high data strobes JEDEC standard 1.35V(1.28V~1.45V) Power supply VDD Core power supply JEDEC standard 1.5V(1.425V~1.575V) Power supply VDDQ I/O driver power supply VDDQ=1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V) Clock Freq: 800MHZ for 1600Mb/s/Pin. V DQ I/O reference supply REF Programmable CAS Latency: 6, 7, 8, 9 ,10 ,11 Command/address reference V CA REF Programmable Additive Latency (Posted /CAS): supply 0,CL-2 or CL-1 clock V SPD SPD EEPROM power supply DD Programmable /CAS Write Latency (CWL) I2C serial bus address select for = 8(DDR3-1600) SA0~SA2 EEPROM 8 bit pre-fetch SCL I2C serial bus clock for EEPROM Burst Length: 4, 8 SDA I2C serial bus data for EEPROM Bi-directional Differential Data-Strobe Internal calibration through ZQ pin VSS Ground On Die Termination with ODT pin /RESET Set DRAMs Known State Serial presence detect with EEPROM VTT SDRAM I/O termination supply Asynchronous reset NC No Connection 2