TPS51716 www.ti.com SLUSB94 OCTOBER 2012 Complete DDR2, DDR3, DDR3L, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 2-A LDO, with Buffered Reference Check for Samples: TPS51716 1FEATURES DESCRIPTION The TPS51716 provides a complete power supply for 2 Synchronous Buck Controller (VDDQ) DDR2, DDR3, DDR3L, and LPDDR3 memory Conversion Voltage Range: 3 V to 28 V systems in the lowest total cost and minimum space. Output Voltage Range: 0.7 V to 1.8 V It integrates a synchronous buck regulator controller (VDDQ) with a 2-A sink/source tracking LDO (VTT) 0.8% V Accuracy REF and buffered low noise reference (VTTREF). The D-CAP2 Mode for Ceramic Output TPS51716 employs D-CAP2 mode coupled with Capacitors 500 kHz or 670 kHz operating frequencies that Selectable 500 kHz/670 kHz Switching supports ceramic output capacitors without an Frequencies external compensation circuit. The VTTREF tracks VDDQ/2 with excellent 0.8% accuracy. The VTT, Optimized Efficiency at Light and Heavy which provides 2-A sink/source peak current Loads with Auto-skip Function capabilities, requires only 10-F of ceramic Supports Soft-Off in S4/S5 States capacitance. In addition, the device features a OCL/OVP/UVP/UVLO Protections dedicated LDO supply input. Powergood Output The TPS51716 provides rich, useful functions as well as excellent power supply performance. It supports 2-A LDO(VTT), Buffered Reference(VTTREF) flexible power state control, placing VTT at high-Z in 2-A (Peak) Sink and Source Current S3 and discharging VDDQ, VTT and VTTREF (soft- Requires Only 10- F of Ceramic Output off) in S4/S5 state. It includes programmable OCL Capacitance with low-side MOSFET R sensing, DS(on) OVP/UVP/UVLO and thermal shutdown protections. Buffered, Low Noise, 10-mA VTTREF Output TI offers the TPS51716 in a 20-pin, 3 mm 3 mm, 0.8% VTTREF, 20-mV VTT Accuracy QFN package and specifies it for an ambient temperature range between 40C and 85C. Support High-Z in S3 and Soft-Off in S4/S5 VIN Thermal Shutdown 20-Pin, 3 mm 3 mm, QFN Package 5VIN TPS51716 PGND APPLICATIONS VBST 15 12 V5IN VDDQ DDR2/DDR3/DDR3L/LPDDR3 Memory Power DRVH 14 S3 17 S3 Supplies SW 13 S5 16 S5 SSTL 18, SSTL 15, SSTL 135 and HSTL PGND DRVL 11 Termination 6 VREF PGND 10 PGOOD 20 Powergood 8 REFIN VDDQSNS 9 VLDOIN 2 7 GND VTT 3 VTT 19 MODE VTTSNS 1 VTTGND 4 18 TRIP VTTREF 5 VTTREF UDG-12146 AGND PGND AGND PGND 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2D-CAP2, NexFET are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2012, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. TPS51716TPS51716 SLUSB94 OCTOBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. (1) ORDERING INFORMATION ORDERABLE DEVICE OUTPUT MINIMUM T PACKAGE PINS A NUMBER SUPPLY QUANTITY TPS51716RUKR Tape and reel 3000 40C to 85C Plastic Quad Flat Pack (QFN) 20 TPS51716RUKT Mini reel 250 (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (1) ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) VALUE UNIT MIN MAX VBST 0.3 36 (3) VBST 0.3 6 SW 5 30 (2) Input voltage range VLDOIN, VDDQSNS, REFIN 0.3 3.6 V VTTSNS 0.3 3.6 PGND, VTTGND 0.3 0.3 V5IN, S3, S5, TRIP, MODE 0.3 6 DRVH 5 36 (3) DRVH 0.3 6 VTTREF, VREF 0.3 3.6 (2) Output voltage range V VTT 0.3 3.6 DRVL 0.3 6 PGOOD 0.3 6 Junction temperature range, T 125 C J Storage temperature range, T 55 150 C STG (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to the network ground terminal unless otherwise noted. (3) Voltage values are with respect to the SW terminal. THERMAL INFORMATION TPS51716 THERMAL METRIC UNITS RUK (20) PINS Junction-to-ambient thermal resistance 94.1 JA Junction-to-case (top) thermal resistance 58.1 JCtop Junction-to-board thermal resistance 64.3 JB C/W Junction-to-top characterization parameter 31.8 JT Junction-to-board characterization parameter 58.0 JB Junction-to-case (bottom) thermal resistance 5.9 JCbot 2 Submit Documentation Feedback Copyright 2012, Texas Instruments Incorporated Product Folder Links :TPS51716