A3921 Automotive Full Bridge MOSFET Driver FEATURES AND BENEFITS DESCRIPTION High current gate drive for N-channel MOSFET full The A3921 is a full-bridge controller for use with external bridge N-channel power MOSFETs and is specifically designed for High-side or low-side PWM switching automotive applications with high-power inductive loads, such Charge pump for low supply voltage operation as brush DC motors. Top-off charge pump for 100% PWM A unique charge pump regulator provides full (>10 V) gate Cross-conduction protection with adjustable dead time drive for battery voltages down to 7 V and allows the A3921 5.5 to 50 V supply voltage range to operate with a reduced gate drive, down to 5.5 V. Integrated 5 V regulator Diagnostics output A bootstrap capacitor is used to provide the above-battery Low current sleep mode supply voltage required for N-channel MOSFETs. An internal AEC-Q100 qualified charge pump for the high-side drive allows DC (100% duty cycle) operation. Package: 28-pin TSSOP with exposed The full bridge can be driven in fast or slow decay modes using thermal pad (suffix LP) diode or synchronous rectification. In the slow decay mode, current recirculation can be through the high-side or the low- side FETs. The power FETs are protected from shoot-through by resistor adjustable dead time. Integrated diagnostics provide indication of undervoltage, overtemperature, and power bridge faults, and can be configured to protect the power MOSFETs under most short circuit conditions. The A3921 is supplied in a 28-pin TSSOP power package with Not to scale an exposed thermal pad (suffix LP). This package is lead (Pb) free, with 100% matte-tin leadframe plating. VBAT PWM A3921 Direction Fault Flags Typical Application 3921-DS, Rev. 2 April 10, 2019 MCO-0000645A3921 Automotive Full Bridge MOSFET Driver Selection Guide Part Number Packing A3921KLPTR-T 4000 pieces per reel SPECIFICATIONS Absolute Maximum Ratings* Characteristic Symbol Notes Rating Units Load Supply Voltage V 0.3 to 50 V BB Logic Inputs and Outputs 0.3 to 6.5 V V5 Pin 0.3 to 7 V LSS Pin 4 to 6.5 V VDSTH Pin 0.3 to 6.5 V SA and SB Pins 5 to 55 V VDRAIN Pin 5 to 55 V GHA and GHB Pins Sx to Sx+15 V GLA and GLB Pins 5 to 16 V CA and CB Pins 0.3 to Sx+15 V Operating Temperature Range T Range K 40 to 150 C A Junction Temperature T (max) 150 C J Overtemperature event not exceeding 1 s, lifetime duration Transient Junction Temperature T 175 C tJ not exceeding 10 hr guaranteed by design characterization Storage Temperature Range T 55 to 150 C stg *With respect to GND. THERMAL CHARACTERISTICS may require derating at maximum conditions Characteristic Symbol Test Conditions* Value Units 4-layer PCB based on JEDEC standard 28 C/W R JA 2 Package Thermal Resistance 2-layer PCB with 3.8 in. of copper area each side 32 C/W R 2 C/W JP *Additional thermal information available on Allegro website. 2 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com