Low Cost, Complete 12-Bit a Resolver-to-Digital Converter AD2S90 FUNCTIONAL BLOCK DIAGRAM FEATURES Complete Monolithic Resolver-to-Digital Converter REF Incremental Encoder Emulation (1024-Line) Absolute Serial Data (12-Bit) SIN SIN (u f) VEL P.S.D. AND SIN LO HIGH ACCURACY Differential Inputs ANGLE FREQUENCY SIN COS u 12-Bit Resolution COS MULTIPLIER SHAPING ERROR COS LO Industrial Temperature Range AMPLIFIER DIGITAL ANGLE f CLKOUT 20-Lead PLCC U/D NMC HIGH UP-DOWN CLK Low Power (50 mW) DYNAMIC A DECODE COUNTER RANGE V.C.O. B LOGIC DIR NM APPLICATIONS CS LATCH Industrial Motor Control Servo Motor Control SCLK Industrial Gauging SERIAL INTERFACE DATA Encoder Emulation Automotive Motion Sensing and Control Factory Automation Limit Switching GENERAL DESCRIPTION The AD2S90 operates on 5 V dc 5% power supplies and is The AD2S90 is a complete 12-bit resolution tracking resolver- fabricated on Analog Devices Linear Compatible CMOS pro- 2 2 to-digital converter. No external components are required to cess (LC MOS). LC MOS is a mixed technology process that operate the device. combines precision bipolar circuits with low power CMOS logic circuits. The converter accepts 2 V rms 10% input signals in the range 3 kHz20 kHz on the SIN, COS and REF inputs. A Type II PRODUCT HIGHLIGHTS servo loop is employed to track the inputs and convert the input Complete Resolver-Digital Interface. The AD2S90 provides SIN and COS information into a digital representation of the the complete solution for digitizing resolver signals (12-bit reso- input angle. The bandwidth of the converter is set internally at lution) without the need for external components. 1 kHz within the tolerances of the device. The guaranteed maxi- mum tracking rate is 500 rps. Dual Format Position Data. Incremental encoder emulation in standard A QUAD B format with selectable North Marker Angular position output information is available in two forms, width. Absolute serial 12-bit angular binary position data absolute serial binary and incremental A quad B. accessed via simple 3-wire interface. The absolute serial binary output is 12-bit (1 in 4096). The data Single High Accuracy Grade in Low Cost Package. 10.6 arc output pin is high impedance when Chip Select CS is logic HI. minutes of angular accuracy available in a 20-lead PLCC. This allows the connection of multiple converters onto a com- mon bus. Absolute angular information in serial pure binary Low Power. Typically 50 mW power consumption. form is accessed by CS followed by the application of an exter- nal clock (SCLK) with a maximum rate of 2 MHz. The encoder emulation outputs A, B and NM continuously produce signals equivalent to a 1024 line encoder. When de- coded this corresponds to 12 bits of resolution. Three common north marker pulsewidths are selected via a single pin (NMC). An analog velocity output signal provides a representation of velocity from a rotating resolver shaft traveling in either a clock- wise or counterclockwise direction. REV. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: (V = +5 V 6 5%, V = 5 V 6 5%, AGND = DGND = 0 V, T = 408C to +858C unless DD SS A AD2S90SPECIFICATIONS otherwise noted) Parameter Min Typ Max Units Test Condition SIGNAL INPUTS Voltage Amplitude 1.8 2.0 2.2 V rms Sinusoidal Waveforms, Differential SIN to SINLO, COS to COSLO Frequency 3 20 kHz Input Bias Current 100 nA V = 2 10% V rms IN Input Impedance 1.0 MW V = 2 10% V rms IN 1 Common-Mode Volts 100 mV peak CMV SINLO, COSLO w.r.t. CMRR 60 dB AGND 10 kHz REFERENCE INPUT Voltage Amplitude 1.8 2.0 3.35 V rms Sinusoidal Waveform Frequency 3 20 kHz Input Bias Current 100 nA Input Impedance 100 kW Permissible Phase Shift 10 +10 Degrees Relative to SIN, COS Inputs CONVERTER DYNAMICS Bandwidth 700 840 1000 Hz Maximum Tracking Rate 500 rps Maximum VCO Rate (CLKOUT) 2.048 MHz Settling Time 1 Step 2 7 ms 179 Step 20 ms ACCURACY 2 Angular Accuracy 10.6 + 1 LSB arc min 3 Repeatability 1 LSB VELOCITY OUTPUT Scaling 120 150 180 rps/V dc Output Voltage at 500 rps 2.78 3.33 4.17 V dc Load Drive Capability 250 mAV = 2.5 V dc (typ), R 10 kW OUT L LOGIC INPUTS SCLK, CS Input High Voltage (V ) 3.5 V dc V = +5 V dc, V = 5 V dc INH DD SS Input Low Voltage (V ) 1.5 V dc V = +5 V dc, V = 5 V dc INL DD SS Input Current (I ) 10 m A IN Input Capacitance 10 pF 4 LOGIC OUTPUTS DATA, A, B, NM, CLKOUT, DIR V = +5 V dc, V = 5 V dc DD SS Output High Voltage 4.0 V dc I = 1 mA OH Output Low Voltage 1.0 V dc I = 1 mA OL 0.4 V dc I = 400 m A OL SERIAL CLOCK (SCLK) SCLK Input Rate 2 MHz NORTH MARKER CONTROL (NMC) 90 +4.75 +5.0 +5.25 V dc North Marker Width Relative to 180 0.75 DGND +0.75 V dc A Cycle 360 4.75 5.0 5.25 V dc POWER SUPPLIES V +4.75 +5.00 +5.25 V dc DD V 4.75 5.00 5.25 V dc SS I 10 mA DD I 10 mA SS NOTES 1 If the tolerance on signal inputs = 5%, then CMV = 200 mV. 2 1 LSB = 5.3 arc minute. 3 Specified at constant temperature. 4 Output load drive capability. Specifications subject to change without notice. 2 REV. D