18-Bit, 2 MSPS Precision, Differential SAR ADC Known Good Die AD4003-KGD FEATURES GENERAL DESCRIPTION The AD4003-KGD is a low noise, low power, high speed, 18-bit, Throughput: 2 MSPS INL: 1.0 LSB (3.8 ppm) maximum precision successive approximation register (SAR) analog-to-digital Guaranteed 18-bit no missing codes converter (ADC). The AD4003-KGD offers a 2 MSPS throughput. Low power The AD4003-KGD incorporates ease of use features that reduce 9.5 mW at 2 MSPS, 4.9 mW at 1 MSPS, 2.4 mW at 500 kSPS signal chain power consumption and complexity, and enable higher (VDD only) channel density. The high-Z mode, coupled with a long acquisition 80 W at 10 kSPS, 16 mW at 2 MSPS (total) phase, eliminates the need for a dedicated high power, high speed SNR: 100.5 dB typical at 1 kHz, V = 5 V 99 dB typical at ADC driver. Eliminating this ADC driver broadens the range of REF 100 kHz low power, precision amplifiers that can drive this ADC directly, THD: 123 dB typical at 1 kHz, V = 5 V 100 dB typical at REF while still achieving optimum performance. The input span com- 100 kHz pression feature enables the ADC driver amplifier and the ADC to Ease of use features reduce system power and complexity operate off common supply rails without a negative supply, yet Input overvoltage clamp circuit preserves the full ADC code range. The low serial peripheral Reduced nonlinear input charge kickback interface (SPI) clock rate requirement reduces the digital input/ High-Z mode output power consumption, broadens processor options, and Long acquisition phase simplifies the task of sending data across digital isolation. Input span compression Operating from a 1.8 V supply, the AD4003-KGD has a V fully REF Fast conversion time allows low SPI clock rates differential input range, with VREF ranging from 2.4 V to 5.1 V, and SPI-programmable modes, read/write capability, status word consumes 16 mW at 2 MSPS with a minimum SCK rate of 75 MHz Differential analog input range: V REF in turbo mode. The AD4003-KGD achieves 1.0 LSB integral non- 0 V to V with V from 2.4 V to 5.1 V REF REF linearty (INL) error maximum and guarantees no missing codes Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface at 18 bits with 100.5 dB typical signal-to-noise ratio (SNR) for SAR architecture: no latency/pipeline delay, valid first conversion 1 kHz inputs. The reference voltage is applied externally and can be First conversion accurate set independently of the supply voltage. Guaranteed operation: 40C to +125C The SPI-compatible, serial interface features seven modes, includ- SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface ing the ability, using the SDI input, to daisy-chain several ADCs on Ability to daisy chain multiple ADCs and busy indicator a single 3-wire bus and provides an optional busy indicator. The APPLICATIONS AD4003-KGD uses a simple SPI interface for writing to the config- uration register and receiving conversion results. The SPI interface Automatic test equipment uses a separate supply, VIO, set to the host logic level. By using the Machine automation VIO supply, the AD4003-KGD is compatible with 1.8 V, 2.5 V, 3 V, Medical equipment and 5 V logic. Battery-powered equipment Precision data acquisition systems Additional application and technical information can be found in the AD4003/AD4007/AD4011 data sheet. Known Good Die (KGD): these die are fully guaranteed to data sheet specifications. FUNCTIONAL BLOCK DIAGRAM 2.5V TO 5V 1.8V 10F REF VDD AD4003-KGD VIO V 1.8V TO 5V REF HIGH-Z TURBO V /2 SDI REF MODE MODE IN+ 0 SCK 3-WIRE OR 4-WIRE SERIAL 18-BIT SDO SPI INTERFACE INTERFACE SAR ADC (DAISY CHAIN, CS) V IN REF CNV STATUS SPAN CLAMP V /2 REF BITS COMPRESSION 0 GND Figure 1. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 16525-001AD4003-KGD Known Good Die TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................7 Applications ....................................................................................... 1 ESD Caution...................................................................................7 General Description ......................................................................... 1 Pin Configuration and Function Description ...............................8 Functional Block Diagram .............................................................. 1 Outline Dimensions ..........................................................................9 Revision History ............................................................................... 2 Die Specifications and Assembly Recommendations ..............9 Specif icat ions ..................................................................................... 3 Ordering Guide .............................................................................9 Timing Specifications .................................................................. 5 REVISION HISTORY 6/2018Revision 0: Initial Version Rev. 0 Page 2 of 9