Dual IF Receiver AD6642 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD DRGND 11-bit, 200 MSPS output data rate per channel Integrated noise shaping requantizer (NSR) AD6642 DC0AB Performance with NSR enabled 14 11 VIN+A SNR: 75.5 dBFS in 40 MHz band to 70 MHz 185 MSPS PIPELINE NOISE SHAPING D0AB ADC REQUANTIZER VINA SNR: 73.7 dBFS in 60 MHz band to 70 MHz 185 MSPS VCMA Performance with NSR disabled 14 11 VIN+B PIPELINE NOISE SHAPING D10AB SNR: 66.5 dBFS to 70 MHz 185 MSPS ADC REQUANTIZER VINB SFDR: 83 dBc to 70 MHz 185 MSPS VCMB Low power: 0.62 W 185 MSPS MODE REFERENCE 1.8 V analog supply operation CLOCK SYNC DIVIDER 1.8 V LVDS (ANSI-644 levels) output PDWN SERIAL PORT 1-to-8 integer clock divider Internal ADC voltage reference SCLK SDIO CSB CLK+ CLK 1.75 V p-p analog input range (programmable to 2.0 V p-p) Differential analog inputs with 800 MHz bandwidth Figure 1. 95 dB channel isolation/crosstalk PRODUCT HIGHLIGHTS Serial port control User-configurable built-in self-test (BIST) capability 1. Two ADCs are contained in a small, space-saving, Energy-saving power-down modes 10 mm 10 mm 1.4 mm, 144-ball CSP BGA package. 2. Pin selectable noise shaping requantizer (NSR) function APPLICATIONS that allows for improved SNR within a reduced bandwidth Communications of up to 60 MHz at 185 MSPS. Diversity radio and smart antenna (MIMO) systems 3. LVDS digital output interface configured for low cost Multimode digital receivers (3G) FPGA families. WCDMA, LTE, CDMA2000 4. 120 mW per ADC core power consumption. WiMAX, TD-SCDMA 5. Operation from a single 1.8 V supply. I/Q demodulation systems 6. Standard serial port interface (SPI) that supports various General-purpose software radios product features and functions, such as data formatting (offset binary or twos complement), NSR, power-down, test modes, and voltage reference mode. 7. On-chip integer 1-to-8 input clock divider and multichip sync function to support a wide range of clocking schemes and multichannel subsystems. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20092010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. DATA MULTIPLEXER AND LVDS DRIVERS 08563-001AD6642* PRODUCT PAGE QUICK LINKS Last Content Update: 10/27/2017 COMPARABLE PARTS TOOLS AND SIMULATIONS View a parametric search of comparable parts. Visual Analog EVALUATION KITS DESIGN RESOURCES AD6642 Evaluation Board AD6642 Material Declaration PCN-PDN Information DOCUMENTATION Quality And Reliability Application Notes Symbols and Footprints AN-1142: Techniques for High Speed ADC PCB Layout AN-282: Fundamentals of Sampled Data Systems DISCUSSIONS AN-345: Grounding for Low-and-High-Frequency Circuits View all AD6642 EngineerZone Discussions. AN-501: Aperture Uncertainty and ADC System Performance SAMPLE AND BUY AN-586: LVDS Outputs for High Speed A/D Converters Visit the product page to see pricing options. AN-737: How ADIsimADC Models an ADC TECHNICAL SUPPORT AN-741: Little Known Characteristics of Phase Noise AN-742: Frequency Domain Response of Switched- Submit a technical question or find your regional support Capacitor ADCs number. AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter DOCUMENT FEEDBACK AN-807: Multicarrier WCDMA Feasibility Submit feedback for this data sheet. AN-808: Multicarrier CDMA2000 Feasibility AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs AN-835: Understanding High Speed ADC Testing and Evaluation AN-851: A WiMax Double Downconversion IF Sampling Receiver Design AN-878: High Speed ADC SPI Control Software AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual AN-935: Designing an ADC Transformer-Coupled Front End Data Sheet AD6642: Dual IF Receiver Data Sheet User Guides UG-232: Evaluating the AD6642/AD6657 Analog-to- Digital Converters This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.