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AD7124-8BCPZ-RL Analog Devices

AD7124-8BCPZ-RL electronic component of Analog Devices
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Part No.AD7124-8BCPZ-RL
Manufacturer: Analog Devices
Category: Analog to Digital Converters - ADC
Description: Analog to Digital Converters - ADC The AD7124-8 is an 8ch 24b ?-? ADC
Datasheet: AD7124-8BCPZ-RL Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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5000: USD 9.6966 ea
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8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference Data Sheet AD7124-8 FEATURES Low-side power switch General-purpose outputs 3 power modes Multiple filter options RMS noise Internal temperature sensor Low power: 24 nV rms at 1.17 SPS, gain = 128 (255 A typical) Self and system calibration Mid power: 20 nV rms at 2.34 SPS, gain = 128 (355 A typical) Sensor burnout detection Full power: 23 nV rms at 9.4 SPS, gain = 128 (930 A typical) Automatic channel sequencer Up to 22 noise free bits in all power modes (gain = 1) Per channel configuration Output data rate Power supply: 2.7 V to 3.6 V and 1.8 V Full power: 9.38 SPS to 19,200 SPS Independent interface power supply Mid power: 2.34 SPS to 4800 SPS Power-down current: 5 A maximum Low power: 1.17 SPS to 2400 SPS Temperature range: 40C to +125C Rail-to-rail analog inputs for gains > 1 32-lead LFCSP Simultaneous 50 Hz/60 Hz rejection at 25 SPS (single cycle 3-wire or 4-wire serial interface settling) SPI, QSPI, MICROWIRE, and DSP compatible Diagnostic functions (which aid safe integrity level (SIL) Schmitt trigger on SCLK certification) ESD: 4 kV Crosspoint multiplexed analog inputs 8 differential/15 pseudo differential inputs APPLICATIONS Programmable gain (1 to 128) Temperature measurement Band gap reference with 10 ppm/C drift maximum (70 A) Pressure measurement (B grade) Industrial process control Matched programmable excitation currents Instrumentation Internal clock oscillator Smart transmitters On-chip bias voltage generator FUNCTIONAL BLOCK DIAGRAM AV REGCAPA IOV DD REFOUT REFIN1(+) REFIN1() DD REGCAPD BANDGAP V REFIN2(+) BIAS AV 1.9V DD AV 1.8V SS REF AV REFIN2() LDO LDO SS CROSSPOINT MUX AIN0/IOUT/VBIAS AV DD AIN1/IOUT/VBIAS REFERENCE AIN2/IOUT/VBIAS/P1 BUFFERS AIN3/IOUT/VBIAS/P2 DOUT/RDY AIN4/IOUT/VBIAS/P3 BUF SERIAL VARIABLE AIN5/IOUT/VBIAS/P4 24-BIT BURNOUT INTERFACE PGA1 PGA2 DIN DIGITAL - ADC AIN6/IOUT/VBIAS DETECT AND FILTER BUF CONTROL AIN7/IOUT/VBIAS SCLK LOGIC AIN8/IOUT/VBIAS X-MUX CS AIN9/IOUT/VBIAS AIN10/IOUT/VBIAS ANALOG AV CHANNEL SS BUFFERS AIN11/IOUT/VBIAS SEQUENCER SYNC AIN12/IOUT/VBIAS AIN13/IOUT/VBIAS AIN14/IOUT/VBIAS/REFIN2(+) GPOs DIAGNOSTICS AIN15/IOUT/VBIAS/REFIN2() TEMPERATURE AV DD COMMUNICATIONS SENSOR INTERNAL POWER SUPPLY CLK CLOCK SIGNAL CHAIN DIAGNOSTICS EXCITATION DIGITAL PSW CURRENTS POWER SWITCH AD7124-8 AV SS AV DGND SS Figure 1. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20152018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 13048-001AD7124-8 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Calibration................................................................................... 52 Applications ....................................................................................... 1 Span and Offset Limits .............................................................. 53 Functional Block Diagram .............................................................. 1 System Synchronization ............................................................ 54 Revision History ............................................................................... 3 Digital Filter .................................................................................... 55 4 General Description ......................................................................... 5 Sinc Filter ................................................................................... 55 3 Specifications ..................................................................................... 6 Sinc Filter ................................................................................... 57 4 1 Timing Characteristics .............................................................. 11 Fast Settling Mode (Sinc + Sinc Filter) .................................. 59 3 1 Absolute Maximum Ratings .......................................................... 14 Fast Settling Mode (Sinc + Sinc Filter) .................................. 61 Thermal Resistance .................................................................... 14 Post Filters ................................................................................... 63 ESD Caution ................................................................................ 14 Summary of Filter Options ....................................................... 66 Pin Configuration and Function Descriptions ........................... 15 Diagnostics ...................................................................................... 67 Terminology .................................................................................... 18 Signal Chain Check .................................................................... 67 Typical Performance Characteristics ........................................... 19 Reference Detect ......................................................................... 67 RMS Noise and Resolution............................................................ 28 Calibration, Conversion, and Saturation Errors .................... 67 Full Power Mode ......................................................................... 28 Overvoltage/Undervoltage Detection ..................................... 67 Mid Power Mode ........................................................................ 31 Power Supply Monitors ............................................................. 68 Low Power Mode ........................................................................ 34 LDO Monitoring ........................................................................ 68 Getting Started ................................................................................ 37 MCLK Counter ........................................................................... 68 Overview ...................................................................................... 37 SPI SCLK Counter...................................................................... 68 Power Supplies ............................................................................ 38 SPI Read/Write Errors ............................................................... 69 Digital Communication ............................................................. 38 SPI IGNORE Error ................................................................... 69 Configuration Overview ........................................................... 40 Checksum Protection ................................................................ 69 ADC Circuit Information .............................................................. 45 Memory Map Checksum Protection ....................................... 69 Analog Input Channel ............................................................... 45 ROM Checksum Protection...................................................... 70 External Impedance When Using a Gain of 1 ........................ 46 Burnout Currents ....................................................................... 71 Programmable Gain Array (PGA) ........................................... 47 Temperature Sensor ................................................................... 71 Reference ..................................................................................... 47 Grounding and Layout .................................................................. 72 Bipolar/Unipolar Configuration .............................................. 47 Applications Information .............................................................. 73 Data Output Coding .................................................................. 48 Temperature Measurement Using a Thermocouple .............. 73 Excitation Currents .................................................................... 48 Temperature Measurement Using an RTD ............................. 74 Bridge Power-Down Switch ...................................................... 48 Flowmeter .................................................................................... 76 Logic Outputs.............................................................................. 48 On-Chip Registers .......................................................................... 78 Bias Voltage Generator .............................................................. 49 Communications Register ......................................................... 79 Clock ............................................................................................ 49 Status Register ............................................................................. 79 Power Modes ............................................................................... 49 ADC CONTROL Register ....................................................... 80 Standby and Power-Down Modes ............................................ 49 Data Register ............................................................................... 82 Digital Interface .......................................................................... 50 IO CONTROL 1 Register........................................................ 82 DATA STATUS .......................................................................... 52 IO CONTROL 2 Register........................................................ 84 Serial Interface Reset (DOUT RDY DEL and CS EN Bits) 52 ID Register................................................................................... 85 Error Register .............................................................................. 85 Reset ............................................................................................. 52 Rev. E Page 2 of 94

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