2 LC MOS Octal 8-Bit DAC Data Sheet AD7228 FEATURES FUNCTIONAL BLOCK DIAGRAM V V REF DD Eight 8-bit DACs with output amplifiers 11 1 Operates with single or dual supplies WR Microprocessor-compatible (95 ns pulse) 1 9 V OUT1 LATCH 1 DAC 1 No user trims required Skinny 24-lead PDIP, CERDIP, and SOIC packages, and a 2 8 V OUT2 28-lead PLCC surface-mount package LATCH 2 DAC 2 3 7 V OUT3 LATCH 3 DAC 3 4 6 V OUT4 LATCH 4 DAC 4 MSB 13 DATA (8-BIT) 5 5 V OUT5 20 LSB LATCH 5 DAC 5 6 4 V OUT6 LATCH 6 DAC 6 7 3 V OUT7 LATCH 7 DAC 7 8 2 V OUT8 LATCH 8 DAC 8 WR 21 22 A2 CONTROL AD7228 LOGIC A1 23 24 A0 10 12 V GND SS Figure 1. GENERAL DESCRIPTION The AD7228 contains eight 8-bit voltage mode digital-to- analog developed to integrate high speed digital logic circuits and converters (DACs), with output buffer amplifiers and interface precision analog circuits on the same chip. logic on a single monolithic chip. No external trims are required PRODUCT HIGHLIGHTS to achieve the full specified performance for the device. 1. The single chip design of eight 8-bit DACs and amplifiers Separate on-chip latches are provided for each of the eight DACs. allows a dramatic reduction in board space requirements Data is transferred into the data latches through a common and offers increased reliability in systems using multiple 8-bit, TTL/CMOS-compatible input port (5 V). The A0, A1, converters. The PDIP, CERDIP, and SOIC pinout is aimed at and A2 address inputs determine which latch is loaded optimizing board layout with all analog inputs and outputs at when WR goes low. The control logic is speed compatible with one side of the package and all digital inputs at the other. most 8-bit microprocessors. 2. The voltage mode configuration of the DACs allows single supply operation of the AD7228. The device can also be Specified performance is guaranteed for input reference voltages operated with dual supplies giving enhanced performance from 2 V to 10 V when using dual supplies. The device is also for some parameters. specified for single-supply operation using a reference of 10 V. 3. The AD7228 has a common 8-bit data bus with individual Each output buffer amplifier is capable of developing 10 V across a DAC latches, providing a versatile control architecture for 2 k load. simple interface to microprocessors. All latch enable signals The AD7228 is fabricated on an all ion implanted, high speed, are level triggered and speed compatible with most high 2 linear-compatible CMOS (LC MOS) process, specifically performance 8-bit microprocessors. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 19922017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com DATA BUS 13034-001AD7228 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Switching Characteristics .............................................................5 Functional Block Diagram .............................................................. 1 Absolute Maximum Ratings ............................................................6 General Description ......................................................................... 1 ESD Caution...................................................................................6 Product Highlights ........................................................................... 1 Pin Configurations and Function Descriptions ............................7 Revision History ............................................................................... 2 Theory of Operation .........................................................................8 Specifications ..................................................................................... 3 Circuit Information .......................................................................8 Dual Supply ................................................................................... 3 Outline Dimensions ....................................................................... 14 Single Supply ................................................................................. 4 Ordering Guide .......................................................................... 15 REVISION HISTORY 10/2017Rev. C to Rev. D Deleted LCCC Pin Configuration ................................................... 4 Changes to Ordering Guide .......................................................... 15 Changes to Table 3 ............................................................................. 5 Changes to Absolute Maximum Ratings Section and Table 4 ..... 6 12/2015Rev. B to Rev. C Added Table 5 Renumbered Sequentially ..................................... 7 Changes to Features Section............................................................ 1 Added 5 V Single-Supply Operation Section ............................. 12 Changes to Table 1 ............................................................................ 3 Updated Outline Dimensions ....................................................... 14 Changes to Table 2 ............................................................................ 4 Changes to Ordering Guide .......................................................... 15 Rev. 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