FEATURES CONNECTION DIAGRAMS AC PERFORMANCE TO-99 (H) Package 500 ns Settling to 0.01% for 10 V Step 1.5 s Settling to 0.0025% for 10 V Step 75 V/ s Slew Rate 0.0003% Total Harmonic Distortion (THD) 13 MHz Gain Bandwidth Internal Compensation >200 MHz Gain Bandwidth (G = 1000) External Decompensation >1000 pF Capacitive Load Drive Capability with 10 V/ s Slew Rate External Compensation DC PERFORMANCE 0.5 mV max Offset Voltage (AD744B) 8-Lead Plastic Mini-DIP (N) 10 V/ C max Drift (AD744B) 8-Lead SOIC (R) Package and 250 V/mV min Open-Loop Gain (AD744B) 8-Lead Cerdip (Q) Packages Available in Plastic Mini-DIP, Plastic SOIC, Hermetic Cerdip, Hermetic Metal Can Packages and Chip Form Surface Mount (SOIC) Package Available in Tape and Reel in Accordance with EIA-481A Standard APPLICATIONS Output Buffers for 12-Bit, 14-Bit and 16-Bit DACs, ADC Buffers, Cable Drivers, Wideband Preamplifiers and Active Filters PRODUCT DESCRIPTION gains. This makes the AD744 ideal for use as ac preamps in The AD744 is a fast-settling, precision, FET input, monolithic digital signal processing (DSP) front ends. operational amplifier. It offers the excellent dc characteristics of the AD711 BiFET family with enhanced settling, slew rate, The AD744 is available in five performance grades. The AD744J and bandwidth. The AD744 also offers the option of using and AD744K are rated over the commercial temperature range custom compensation to achieve exceptional capacitive load of 0C to +70C. The AD744A and AD744B are rated over drive capability. the industrial temperature range of 40C to +85C. The AD744T is rated over the military temperature range of 55C to +125C The single-pole response of the AD744 provides fast settling: and is available processed to MIL-STD-883B, Rev. C. 500 ns to 0.01%. This feature, combined with its high dc preci- sion, makes it suitable for use as a buffer amplifier for 12-bit, The AD744 is available in an 8-lead plastic mini-DIP, 8-lead 14-bit or 16-bit DACs and ADCs. Furthermore, the AD744s low small outline, 8-lead cerdip or TO-99 metal can. total harmonic distortion (THD) level of 0.0003% and gain band- width product of 13 MHz make it an ideal amplifier for demanding PRODUCT HIGHLIGHTS audio applications. It is also an excellent choice for use in active 1. The AD744 is a high-speed BiFET op amp that offers excel- filters in 12-bit, 14-bit and 16-bit data acquisition systems. lent performance at competitive prices. It outperforms the OPA602/OPA606, LF356 and LF400. The AD744 is internally compensated for stable operation as a unity gain inverter or as a noninverting amplifier with a gain of 2. The AD744 offers exceptional dynamic response. It settles to two or greater. External compensation may be applied to the 0.01% in 500 ns and has a 100% tested minimum slew rate AD744 for stable operation as a unity gain follower. External of 50 V/ s (AD744B). compensation also allows the AD744 to drive 1000 pF capacitive 3. The combination of Analog Devices advanced processing loads, slewing at 10 V/ s with full stability. technology, laser wafer drift trimming and well-matched Alternatively, external decompensation may be used to increase ionimplanted JFETs provide outstanding dc precision. Input the gain bandwidth of the AD744 to over 200 MHz at high offset voltage, input bias current, and input offset current are specified in the warmed-up condition all are 100% tested.( +25 C and 15 V dc, unless otherwise noted) AD744SPECIFICATIONS AD744J/A/S AD744K/B/T Model Conditions Min Typ Max Min Typ Max Unit 1 INPUT OFFSET VOLTAGE Initial Offset 0.3 1.0 0.25 0.5 mV Offset T to T 2 1.0 mV MIN MAX vs. Temp. 5 20 5 10 V/C 2 vs. Supply 82 95 88 100 dB vs. Supply T to T 82 88 dB MIN MAX Long-Term Stability 15 15 V/month 3 INPUT BIAS CURRENT Either Input V = 0 V 30 100 30 100 pA CM Either Input T=V = 0 V MAX CM J, K 70C 0.7 2.3 0.7 2.3 nA A, B, C 85C 1.9 6.4 1.9 6.4 nA S, T 125C 31 102 31 102 nA Either Input V = +10 V 40 150 40 150 pA CM Offset Current V = 0 V 20 50 10 50 pA CM Offset Current T=V = 0 V MAX CM J, K 70C 0.4 1.1 0.2 1.1 nA A, B, C 85C 1.3 3.2 0.6 3.2 nA S, T 125C2052 1052nA FREQUENCY RESPONSE Gain BW, Small Signal G = 1 8 13 9 13 MHz Full Power Response V = 20 V p-p 1.2 1.2 MHz O Slew Rate, Unity Gain G = 1 45 75 50 75 V/ s 4 Settling Time to 0.01% G = 1 0.5 0.75 0.5 0.75 s Total Harmonic f = 1 kHz Distortion R1 2 k V = 3 V rms 0.0003 0.0003 % O INPUT IMPEDANCE 12 12 Differential 3 10 5.5 3 10 5.5 pF 12 12 Common Mode 3 10 5.5 3 10 5.5 pF INPUT VOLTAGE RANGE 5 Differential 20 20 V Common-Mode Voltage +14.5, 11.5 +14.5, 11.5 V 6 Over Max Operating Range 11 +13 11 +13 V Common-Mode Rejection Ratio V = 10 V 78 88 82 88 dB CM T to T 76 84 80 84 dB MIN MAX V = 11 V 72 84 78 84 dB CM T to T 70 80 74 80 dB MIN MAX INPUT VOLTAGE NOISE 0.1 to 10 Hz 2 2 V p-p f = 10 Hz 45 45 nV/Hz f = 100 Hz 22 22 nV/Hz f = 1 kHz 18 18 nV/Hz f = 10 kHz 16 16 nV/Hz INPUT CURRENT NOISE f = 1 kHz 0.01 0.01 pA/Hz 7 OPEN LOOP GAIN V = 10 V O R 2 k 200 400 250 400 V/mV LOAD T to T 100 100 V/mV MIN MAX OUTPUT CHARACTERISTICS Voltage R 2 k +13, 12.5 +13.9, 13.3 +13, 12.5 +13.9, 13.3 V LOAD T to T 12 +13.8, 13.1 12 +13.8, 13.1 V MIN MAX Current Short Circuit 25 25 mA 8 Capacitive Load Gain = 1 1000 1000 pF POWER SUPPLY Rated Performance 15 15 V Operating Range 4.5 18 4.5 18 V Quiescent Current 3.5 5.0 3.5 4.0 mA NOTES 1 Input offset voltage specifications are guaranteed after 5 minutes of operation at T = +25C. A 2 PSRR test conditions: +V = 15 V, V = 12 V to 18 V and +V = +12 V to +18 V, V = 15 V. S S S S 3 Bias Current Specifications are guaranteed maximum at either input after 5 minutes of operation at T = +25C. For higher temperature, the current doubles every 10C. A 4 Gain = 1, R = 2 k, C = 10 pF, refer to Figure 25. L L 5 Defined as voltage between inputs, such that neither exceeds 10 V from ground. 6 Typically exceeding 14.1 V negative common-mode voltage on either input results in an output phase reversal. 7 Open-Loop Gain is specified with V both nulled and unnulled. OS 8 Capacitive load drive specified for C = 20 pF with the device connected as shown in Figure 32. Under these conditions, slew rate = 14 V/ s and 0.01% settling time = 1.5 s typical. COMP Refer to Table II for optimum compensation while driving a capacitive load. Specifications subject to change without notice. All min and max specifications are guaranteed. 2 REV. D