1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC AD7492 FEATURES FUNCTIONAL BLOCK DIAGRAM AV DV V Specified for VDD of 2.7 V to 5.25 V DD DD REF OUT DRIVE 4 21 20 5 Throughput rate of 1 MSPS (AD7492) 2.5V Throughput rate of 1.25 MSPS (AD7492-5) CLOCK REF OSCILLATOR Throughput rate of 400 kSPS (AD7492-4) BUF Low power 4 mW typ at 1 MSPS with 3 V supplies DB11 11 mW typ at 1 MSPS with 5 V supplies OUTPUT 6 12-BIT SAR T/H V IN DRIVERS ADC DB0 Wide input bandwidth 70 dB typ SNR at 100 kHz input frequency 2.5 V internal reference 11 PS/FS On-chip CLK oscillator CONTROL 10 8 CONVST CS Flexible power/throughput rate management LOGIC 9 RD No pipeline delays AD7492 High speed parallel interface 12 BUSY Sleep mode: 50 nA typ 719 24-lead SOIC and TSSOP packages AGND DGND Figure 1. GENERAL DESCRIPTION FS The type of sleep mode is hardware selected by the PS/ pin. The AD7492, AD7492-4, and AD7492-5 are 12-bit high speed, low power, successive approximation ADCs. The parts operate Using these sleep modes allows very low power dissipation from a single 2.7 V to 5.25 V power supply and feature numbers at lower throughput rates. throughput rates up to 1.25 MSPS. They contain a low noise, wide bandwidth track/hold amplifier that can handle The analog input range for the part is 0 V to REFIN. The bandwidths up to 10 MHz. 2.5 V reference is supplied internally and is available for external referencing. The conversion rate is determined by the The conversion process and data acquisition are controlled internal clock. using standard control inputs allowing for easy interface to PRODUCT HIGHLIGHTS microprocessors or DSPs. The input signal is sampled on the falling edge of CONVST and conversion is also initiated at this 1. High Throughput with Low Power Consumption. The point. The BUSY pin goes high at the start of conversion and AD7492-5 offers 1.25 MSPS throughput with 16 mW goes low 880 ns (AD7492/AD7492-4) or 680 ns (AD7492-5) power consumption. later to indicate that the conversion is complete. There are no 2. Flexible Power/Throughput Rate Management. The pipeline delays associated with the part. The conversion result is conversion time is determined by an internal clock. The CS RD accessed via standard and signals over a high speed part also features two sleep modes, partial and full, to parallel interface. maximize power efficiency at lower throughput rates. The AD7492 uses advanced design techniques to achieve very 3. No Pipeline Delay. The part features a standard successive low power dissipation at high throughput rates. With 5 V approximation ADC with accurate control of the sampling supplies and 1.25 MSPS, the average current consumption CONVST instant via a input and once-off conversion AD7492-5 is typically 2.75 mA. The part also offers flexible control. power/throughput rate management. 4. Flexible Digital Interface. The V feature controls the DRIVE voltage levels on the I/O digital pins. It is also possible to operate the part in a full sleep mode and a partial sleep mode, where the part wakes up to do a conversion 5. Fewer Peripheral Components. The AD7492 optimizes and automatically enters a sleep mode at the end of conversion. PCB space by using an internal reference and internal CLK. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Trademarks and registered trademarks are the property of their respective owners. 01128-001AD7492 TABLE OF CONTENTS Features .............................................................................................. 1 Converter Operation.................................................................. 13 Functional Block Diagram .............................................................. 1 Typical Connection Diagram ................................................... 13 General Description ......................................................................... 1 ADC Transfer Function............................................................. 13 Product Highlights ....................................................................... 1 AC Acquisition Time ................................................................. 14 Revision History ........................................................................... 2 DC Acquisition Time................................................................. 14 Specifications..................................................................................... 3 Analog Input ............................................................................... 14 AD7492-5 ...................................................................................... 3 Parallel Interface......................................................................... 14 AD7492/AD7492-4 ...................................................................... 4 Operating Modes........................................................................ 14 Timing Specifications .................................................................. 6 Power-Up..................................................................................... 16 Absolute Maximum Ratings............................................................ 7 Grounding and Layout .............................................................. 18 ESD Caution.................................................................................. 7 Power Supplies............................................................................ 18 Pin Configuration and Function Descriptions............................. 8 Microprocessor Interfacing....................................................... 18 Typical Peformance Characteristics............................................. 10 Outline Dimensions....................................................................... 21 Terminology .................................................................................... 12 Ordering Guide .......................................................................... 21 Circuit Description......................................................................... 13 REVISION HISTORY 5/06Rev. 0 to Rev. A Added AD7492-4................................................................Universal Changes to Table 4............................................................................ 8 Updated Outline Dimensions ....................................................... 22 Changes to Ordering Guide .......................................................... 22 1/01Revision 0: Initial Version Rev. A Page 2 of 24