CMOS
a
8-Bit Buffered Multiplying DAC
AD7524
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Microprocessor Compatible (6800, 8085, Z80, Etc.)
TTL/CMOS Compatible Inputs
On-Chip Data Latches
Endpoint Linearity
Low Power Consumption
Monotonicity Guaranteed (Full Temperature Range)
Latch Free (No Protection Schottky Required)
APPLICATIONS
Microprocessor Controlled Gain Circuits
Microprocessor Controlled Attenuator Circuits
Microprocessor Controlled Function Generation
Precision AGC Circuits
Bus Structured Instruments
GENERAL DESCRIPTION
The AD7524 is a low cost, 8-bit monolithic CMOS DAC
designed for direct interface to most microprocessors.
ORDERING GUIDE
Basically an 8-bit DAC with input latches, the AD7524s load
Temperature Nonlinearity Package
cycle is similar to the write cycle of a random access
1 2
Model Range (V = +15 V) Option
DD
memory. Using an advanced thin-film on CMOS fabrication
process, the AD7524 provides accuracy to 1/8 LSB with a typi-
AD7524JN 40C to +85C 1/2 LSB N-16
cal power dissipation of less than 10 milliwatts.
AD7524KN 40C to +85C 1/4 LSB N-16
AD7524LN 40C to +85C 1/8 LSB N-16
A newly improved design eliminates the protection Schottky
AD7524JP 40C to +85C 1/2 LSB P-20A
previously required and guarantees TTL compatibility when
AD7524KP 40C to +85C 1/4 LSB P-20A
using a +5 V supply. Loading speed has been increased for
AD7524LP 40C to +85C 1/8 LSB P-20A
compatibility with most microprocessors.
AD7524JR 40C to +85C 1/2 LSB R-16A
Featuring operation from +5 V to +15 V, the AD7524 inter-
AD7524AQ 40C to +85C 1/2 LSB Q-16
faces directly to most microprocessor buses or output ports.
AD7524BQ 40C to +85C 1/4 LSB Q-16
Excellent multiplying characteristics (2- or 4-quadrant) make AD7524CQ 40C to +85C 1/8 LSB Q-16
the AD7524 an ideal choice for many microprocessor con- AD7524SQ 55C to +125C 1/2 LSB Q-16
trolled gain setting and signal control applications. AD7524TQ 55C to +125C 1/4 LSB Q-16
AD7524UQ 55C to +125C 1/8 LSB Q-16
AD7524SE 55C to +125C 1/2 LSB E-20A
AD7524TE 55C to +125C 1/4 LSB E-20A
AD7524UE 55C to +125C 1/8 LSB E-20A
NOTES
1
To order MIL-STD-883, Class B processed parts, add/883B to part number.
Contact your local sales office for military data sheet. For U.S. Standard
Military Drawing (SMD) see DESC drawing #5962-87700.
2
E = Leadless Ceramic Chip Carrier: N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip; R = SOIC.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703(V = +10 V, V = V = 0 V, unless otherwise noted)
REF OUT1 OUT2
AD7524SPECIFICATIONS
1
Limit, T = +258C Limit, T , T
A MIN MAX
Parameter V = +5 V V = +15 V V = 5 V V = +15 V Units Test Conditions/Comments
DD DD DD DD
STATIC PERFORMANCE
Resolution 8 8 8 8 Bits
Relative Accuracy
J, A, S Versions 1/2 1/2 1/2 1/2 LSB max
K, B, T Versions 1/2 1/4 1/2 1/4 LSB max
L, C, U Versions 1/2 1/8 1/2 1/8 LSB max
Monotonicity Guaranteed Guaranteed Guaranteed Guaranteed
2
Gain Error 2 1/2 1 1/4 3 1/2 1 1/2 LSB max
3
Average Gain TC 40 10 40 10 ppm/C Gain TC Measured from +25C to
T or from +25C to T
MIN MAX
3
DC Supply Rejection, Gain/V 0.08 0.02 0.16 0.04 % FSR/% max V = 10%
DD DD
0.002 0.001 0.01 0.005 % FSR/% typ
Output Leakage Current
I (Pin 1) 50 50 400 200 nA max DB0DB7 = 0 V; WR, CS = 0 V; V = 10 V
OUT1 REF
I (Pin 2) 50 50 400 200 nA max DB0DB7 = V ; WR, CS = 0 V; V = 10 V
OUT2 DD REF
DYNAMIC PERFORMANCE
3
Output Current Settling Time
(to 1/2 LSB) 400 250 500 350 ns max OUT1 Load = 100 , C = 13 pF; WR, CS =
EXT
0 V; DB0DB7 = 0 V to V to 0 V.
DD
3
AC Feedthrough
at OUT1 0.25 0.25 0.5 0.5 % FSR max V = 10 V, 100 kHz Sine Wave; DB0DB7 =
REF
at OUT2 0.25 0.25 0.5 0.5 % FSR max 0 V; WR, CS = 0 V
REFERENCE INPUT
4
R (Pin 15 to GND) 5 555 k min
IN
20 20 20 20 k max
ANALOG OUTPUTS
3
Output Capacitance
C (Pin 1) 120 120 120 120 pF max DB0DB7 = V ; WR, CS = 0 V
OUT1 DD
C (Pin 2) 30 30 30 30 pF max
OUT2
C (Pin 1) 30 30 30 30 pF max DB0DB7 = 0 V; WR, CS = 0 V
OUT1
C (Pin 2) 120 120 120 120 pF max
OUT2
DIGITAL INPUTS
Input HIGH Voltage Requirement
V +2.4 +13.5 +2.4 +13.5 V min
IH
Input LOW Voltage Requirement
+0.8 +1.5 +0.5 +1.5 V max
V
IL
Input Current
I 1 1 10 10 A max V = 0 V or V
IN IN DD
3
Input Capacitance
DB0DB7 5 5 5 5 pF max V = 0 V
IN
WR, CS 20 20 20 20 pF max V = 0 V
IN
SWITCHING CHARACTERISTICS
5
Chip Select to Write Setup Time See Timing Diagram
t t = t
CS WR CS
AD7524J, K, L, A, B, C 170 100 220 130 ns min
AD7524S, T, U 170 100 240 150 ns min
Chip Select to Write Hold Time
t
CH
All Grades 0 0 0 0 ns min
Write Pulse Width
t t t , t 0
WR CS WR CH
AD7524J, K, L, A, B, C 170 100 220 130 ns min
AD7524S, T, U 170 100 240 150 ns min
Data Setup Time
t
DS
AD7524J, K, L, A, B, C 135 60 170 80 ns min
AD7524S, T, U 135 60 170 100 ns min
Data Hold Time
t
DH
All Grades 10 10 10 10 ns min
POWER SUPPLY
I 1 2 2 2 mA max All Digital Inputs V or V
DD IL IH
100 100 500 500 A max All Digital Inputs 0 V or V
DD
NOTES
1
Temperature ranges as follows: J, K, L versions: 40C to +85C
A, B, C versions: 40C to +85C
S, T, U versions: 55C to +125C
2
Gain error is measured using internal feedback resistor. Full-Scale Range (FSR) = V .
REF
3
Guaranteed not tested.
4
DAC thin-film resistor temperature coefficient is approximately 300 ppm/C.
5
AC parameter, sample tested @ +25C to ensure conformance to specification.
Specifications subject to change without notice.
2 REV. B