250 kSPS, 6-Channel, Simultaneous Sampling, Bipolar, 16-/14-/12-Bit ADC Data Sheet AD7656-1/AD7657-1/AD7658-1 FEATURES FUNCTIONAL BLOCK DIAGRAM V CONVST A CONVST B CONVST C AV DV DD CC CC Pin and software compatible with AD7656/AD7657/AD7658 featuring reduced decoupling requirements CS 6 independent ADCs CLK REF CONTROL SER/PAR SEL OSC True bipolar analog inputs LOGIC V DRIVE Pin-/software-selectable ranges: 10 V, 5 V STBY BUF Fast throughput rate: 250 kSPS OUTPUT 16-/14-/ DB8/DOUT A DRIVERS V1 T/H iCMOS process technology 12-BIT SAR Low power DB6/SCLK 16-/14-/ 140 mW at 250 kSPS with 5 V supplies V2 T/H 12-BIT SAR High noise performance with wide bandwidth OUTPUT DB9/DOUT B BUF DRIVERS 88 dB SNR at 10 kHz input frequency 16-/14-/ V3 T/H 12-BIT SAR OUTPUT On-chip reference and reference buffers DRIVERS DB10/DOUT C High speed parallel, serial, and daisy-chain interface modes 16-/14-/ V4 T/H High speed serial interface 12-BIT SAR DATA/ OUTPUT CONTROL DRIVERS SPI/QSPI/MICROWIRE/DSP compatible BUF LINES 16-/14-/ Standby mode: 315 W maximum V5 T/H 12-BIT SAR RD 64-lead LQFP WR/REF EN/DIS 16-/14-/ V6 T/H APPLICATIONS 12-BIT SAR AD7656-1/AD7657-1/AD7658-1 Power line monitoring and measuring systems Instrumentation and control systems V AGND DGND SS Multiaxis positioning systems Figure 1. GENERAL DESCRIPTION 1 The AD7656-1/AD7657-1/AD7658-1 are reduced decoupling pin- The conversion process and data acquisition are controlled and software-compatible versions of AD7656/AD7657/AD7658. using the CONVST signals and an internal oscillator. Three The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ CONVST pins (CONVST A, CONVST B, and CONVST C) 14-/12-bit, fast, low power successive approximation ADCs in allow independent, simultaneous sampling of the three ADC a package designed on the iCMOS process (industrial CMOS). pairs. The AD7656-1/AD7657-1/AD7658-1 have a high speed iCMOS is a process combining high voltage silicon with submicron parallel and serial interface, allowing the devices to interface with CMOS and complementary bipolar technologies. It enables the microprocessors or DSPs. When the serial interface is selected, development of a wide range of high performance analog ICs each part has a daisy-chain feature that allows multiple ADCs to capable of 33 V operation in a footprint that no previous generation connect to a single serial interface. The AD7656-1/AD7657-1/ of high voltage parts could achieve. Unlike analog ICs using conven- AD7658-1 can accommodate true bipolar input signals in the tional CMOS processes, iCMOS components can accept bipolar 4 V and 2 V ranges. Each AD7656-1/AD7657-1/ REF REF input signals while providing increased performance, which AD7658-1 also contains an on-chip 2.5 V reference. dramatically reduces power consumption and package size. PRODUCT HIGHLIGHTS The AD7656-1/AD7657-1/AD7658-1 feature throughput rates 1. Six 16-/14-/12-bit, 250 kSPS ADCs on board. of up to 250 kSPS. The parts contain low noise, wide bandwidth 2. Six true bipolar, high impedance analog inputs. track-and-hold amplifiers that can handle input frequencies 3. High speed parallel and serial interfaces. up to 4.5 MHz. 4. Reduced decoupling requirements and reduced bill of materials cost compared with the AD7656/AD7657/ AD7658 devices. 1 Protected by U.S. Patent No. 6,731,232. Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 20082012 Analog Devices, Inc. All rights reserved. 07017-001AD7656-1/AD7657-1/AD7658-1 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 20 Applications ....................................................................................... 1 Converter Details ....................................................................... 20 Functional Block Diagram .............................................................. 1 ADC Transfer Function ............................................................. 21 General Description ......................................................................... 1 Internal/External Reference ...................................................... 21 Product Highlights ........................................................................... 1 Typical Connection Diagram ................................................... 21 Revision History ............................................................................... 2 Driving the Analog Inputs ........................................................ 22 Specifications ..................................................................................... 3 Interface Options ........................................................................ 22 AD7656-1 ...................................................................................... 3 Software Selection of ADCs ...................................................... 24 AD7657-1 ...................................................................................... 5 Changing the Analog Input Range (H/S SEL = 0) ................ 25 AD7658-1 ...................................................................................... 7 Changing the Analog Input Range (H/S SEL = 1) ................ 25 Timing Specifications .................................................................. 9 Serial Read Operation ................................................................ 25 Absolute Maximum Ratings .......................................................... 10 PAR Daisy-Chain Mode (DCEN = 1, SER/ SEL = 1) ............. 27 Thermal Resistance .................................................................... 10 Application Hints ........................................................................... 29 ESD Caution ................................................................................ 10 Layout .......................................................................................... 29 Pin Configuration and Function Descriptions ........................... 11 Power Supply Configuration..................................................... 29 Typical Performance Characteristics ........................................... 14 Outline Dimensions ....................................................................... 30 Terminology .................................................................................... 18 Ordering Guide .......................................................................... 30 REVISION HISTORY 3/12Rev. C to Rev. D Changes to Table 3 ............................................................................. 7 Changes to Figure 28 ...................................................................... 22 Changes to Table 4 ............................................................................. 9 Changes to Absolute Maximum Ratings Table .......................... 10 Changes to Pin Functions Description Table ............................. 11 11/10Rev. B to Rev. C Added Power Supply Configuration Section .............................. 29 Changes to Figure 9 ........................................................................ 14 Added Figure 39 .............................................................................. 29 Changes to Converter Details Section ......................................... 20 Changes to Internal/External Reference Section ....................... 21 6/10Rev. A to Rev. B Changes to Interface Options Section ......................................... 22 Changes to DC Accuracy Parameter, Table 1 ............................... 3 Changes to Parallel Interface Section .......................................... 22 Changes to DC Accuracy Parameter, Table 2 ............................... 5 Changes to Serial Interface (SER/ SEL = 1) Section .......... 25 PAR Change to DC Accuracy Parameter, Table 3 ................................. 7 Changes to Daisy-Chain Mode (DCEN = 1, SER/PAR SEL = 1) .. 27 Added %FSR to Terminology Section ......................................... 19 Changes to Layout Section ............................................................ 30 Updated Outline Dimension ........................................................ 31 3/09Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 31 Changes to Features .......................................................................... 1 Changes to Table 1 ............................................................................ 3 7/08Revision 0: Initial Version Changes to Table 2 ............................................................................ 5 Rev. D Page 2 of 32