4:1 HDMI/DVI Switch with Equalization AD8197 FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI links Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191 RESET 4 TMDS channels per link PARALLEL AD8197 SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C SDA DVCC CONFIG CONTROL I2C SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C ADDR 2:0 AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 on-chip terminations + 4 VTTO IP A 3:0 4 IN A 3:0 Pre-emphasized outputs + 4 IP B 3:0 4 4 Low added jitter + IN B 3:0 OP 3:0 SWITCH 4 + 4 CORE ON 3:0 IP C 3:0 Single-supply operation (3.3 V) PE 4 EQ IN C 3:0 4 auxiliary channels per link + 4 IP D 3:0 4 IN D 3:0 Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX A 3:0 Allows switching of DDC bus and 2 additional signals 4 AUX B 3:0 4 SWITCH 4 AUX COM 3:0 CORE AUX C 3:0 Multiple channel bundling modes 4 AUX D 3:0 1 (4:1) HDMI/DVI link switch (default) LOW SPEED UNBUFFERED 2 (8:1) TMDS channel and auxiliary signal switch BIDIRECTIONAL 1 (16:1) TMDS channel and auxiliary signal switch Figure 1. Output disable feature TYPICAL APPLICATION Reduced power dissipation GAME CONSOLE MEDIA CENTER Removable output termination HDTV SET Allows building of larger arrays HDMI RECEIVER Two AD8197s support HDMI/DVI dual-link SET-TOP BOX DVD PLAYER Standards compatible: HDMI receiver, HDCP, DVI AD8197 04:20 2 Serial (I C slave) and parallel control interface 100-lead, 14 mm 14 mm LQFP, Pb-free package Figure 2. Typical HDTV Application APPLICATIONS 4:1 single HDMI/DVI link switch, a dual 8:1 switch, or a single Multiple input displays 16:1 switch. Projectors A/V receivers The AD8197 is provided in a 100-lead LQFP, Pb-free, surface- Set-top boxes mount package, specified to operate over the 40C to +85C Advanced television (HDTV) sets temperature range. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197 is an HDMI/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). Flexible channel bundling modes (for both the TMDS channels 3. Auxiliary switch routes a DDC bus and two additional signals and the auxiliary signals) allow the AD8197 to be configured as a for a single-chip, HDMI 1.3 receive-compliant solution. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP CH 1:0 PP OTO PP OCL PP EQ PP EN PP PRE 1:0 06471-001 06471-002AD8197 TABLE OF CONTENTS Features .............................................................................................. 1 Read Procedure........................................................................... 17 Applications....................................................................................... 1 Switching/Update Delay............................................................ 17 General Description ......................................................................... 1 Parallel Control Interface .............................................................. 18 Functional Block Diagram .............................................................. 1 Serial Interface Configuration Registers ..................................... 19 Typical Application........................................................................... 1 High Speed Device Modes Register......................................... 19 Product Highlights ........................................................................... 1 Auxiliary Device Modes Register............................................. 20 Revision History ............................................................................... 2 Receiver Settings Register ......................................................... 22 Specifications..................................................................................... 3 Input Termination Pulse Register 1 and Register 2 ............... 22 Absolute Maximum Ratings............................................................ 5 Receive Equalizer Register 1 and Register 2 ........................... 22 Thermal Resistance ...................................................................... 5 Transmitter Settings Register.................................................... 22 Maximum Power Dissipation ..................................................... 5 Parallel Interface Configuration Registers .................................. 23 ESD Caution.................................................................................. 5 High Speed Device Modes Register......................................... 23 Pin Configuration and Function Descriptions............................. 6 Auxiliary Device Modes Register............................................. 23 Typical Performance Characteristics ............................................. 9 Receiver Settings Register ......................................................... 24 Theory of Operation ...................................................................... 13 Input Termination Pulse Register 1 and Register 2 ............... 24 Introduction ................................................................................ 13 Receive Equalizer Register 1 and Register 2 ........................... 24 Input Channels............................................................................ 13 Transmitter Settings Register.................................................... 24 Output Channels ........................................................................ 13 Application Information................................................................ 25 High Speed (TMDS) Switching Modes ................................... 14 Pinout........................................................................................... 25 Auxiliary Switch.......................................................................... 14 Cable Lengths and Equalization............................................... 25 Auxiliary (Low Speed) Switching Modes ................................ 15 PCB Layout Guidelines.............................................................. 26 Serial Control Interface.................................................................. 16 Outline Dimensions....................................................................... 30 Reset ............................................................................................. 16 Ordering Guide .......................................................................... 30 Write Procedure.......................................................................... 16 REVISION HISTORY 1/07Revision 0: Initial Version Rev. 0 Page 2 of 32