Low Cost, DC to 150 MHz, Variable Gain Amplifier Data Sheet AD8330 FEATURES FUNCTIONAL BLOCK DIAGRAM ENBL OFST CNTR Fully differential signal path, also used with single-sided signals Inputs from 0.3 mV to 1 V rms, rail-to-rail outputs Differential R = 1 k R (each output) 75 CM AND IN OUT OFFSET BIAS AND V REF CONTROL Automatic offset compensation (optional) Linear-in-dB and linear-in-magnitude gain modes INHI OPHI 0 dB to 50 dB, for 0 V < V < 1.5 V (30 mV/dB) DBS OUTPUT VGA CORE STAGES Inverted gain mode: 50 dB to 0 dB at 30 mV/dB INLO OPLO 0.03 to 10 nominal gain for 15 mV < V < 5 V MAG Constant bandwidth: 150 MHz at all gains OUTPUT CMOP MODE GAIN INTERFACE CONTROL Low noise: 5 nV/Hz typical at maximum gain Low distortion: 62 dBc typical Low power: 20 mA typical at V of 2.7 V to 6 V S VDBS CMGN COMM VMAG Available in a space-saving, 3 mm 3 mm LFCSP package Figure 1. APPLICATIONS Pre-ADC signal conditioning 75 cable drivin g adjust AGC amplifiers GENERAL DESCRIPTION The AD8330 is a wideband variable gain amplifier for applications 30 dB lower (that is, 30 dB to +20 dB) to suit the application, requiring a fully differential signal path, low noise, well-defined thereby providing an unprecedented gain range of over 100 dB. gain, and moderately low distortion, from dc to 150 MHz. The A unique aspect of the AD8330 is that its bandwidth and pulse input pins can also be driven from a single-ended source. The response are essentially constant for all gains, over both the peak differential input is 2 V, allowing sine wave operation at basic 50 dB linear-in-dB range, but also when using the linear- 1 V rms with generous headroom. The output pins can drive in-magnitude function. The exceptional stability of the HF single-sided loads essentially rail-to-rail. The differential output response over the gain range is of particular value in those VGA applications where it is essential to maintain accurate gain law- resistance is 150 . The output swing is a linear function of the voltage applied to the VMAG pin that internally defaults to 0.5 V, conformance at high frequencies. providing a peak output of 2 V. This can be raised to 10 V p-p, An external capacitor at Pin OFST sets the high-pass corner of limited by the supply voltage. an offset reduction loop, whose frequency can be as low as 5 Hz. The basic gain function is linear-in-dB, controlled by the voltage When this pin is grounded, the signal path becomes dc-coupled. applied to Pin VDBS. The gain ranges from 0 dB to 50 dB for When used to drive an ADC, an external common-mode control control voltages between 0 V and 1.5 Va slope of 30 mV/dB. voltage at Pin CNTR can be driven to within 0.5 V of either ground The gain linearity is typically within 0.1 dB. By changing the or V to accommodate a wide variety of requirements. By default, S logic level on Pin MODE, the gain decreases over the same range, the two outputs are positioned at the midpoint of the supply, VS/2. with an opposite slope. A second gain control port is provided Other features, such as two levels of power-down (fully off and at the VMAG pin and allows the user to vary the numeric gain a hibernate mode), further extend the practical value of this from a factor of 0.03 to 10. All the parameters of the AD8330 exceptionally versatile VGA. have low sensitivities to temperature and supply voltages. Using The AD8330 is available in 16-lead LFCSP and 16-lead QSOP VMAG, the basic 0 dB to 50 dB range can be repositioned to packages and is specified for operation from 40C to +85C. any value from 20 dB higher (that is, 20 dB to 70 dB) to at least Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20022016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 03217-101AD8330 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 26 Applications ....................................................................................... 1 ADC Driving ............................................................................... 26 Functional Block Diagram .............................................................. 1 Simple AGC Amplifier .............................................................. 26 General Description ......................................................................... 1 Wide Range True RMS Voltmeter ............................................ 27 Revision History ............................................................................... 2 Evaluation Board ............................................................................ 29 Specif icat ions ..................................................................................... 3 General Description ................................................................... 29 Absolute Maximum Ratings ............................................................ 5 Basic Operation .......................................................................... 29 ESD Caution .................................................................................. 5 Options ........................................................................................ 30 Pin Configurations and Function Descriptions ........................... 6 Measurement Setup.................................................................... 30 Typical Performance Characteristics ............................................. 8 AD8330-EVALZ Board Design ................................................. 30 Theory of Operation ...................................................................... 15 Outline Dimensions ....................................................................... 32 Circuit Description..................................................................... 15 Ordering Guide .......................................................................... 32 Using the AD8330 ...................................................................... 21 REVISION HISTORY 5/2016Rev. G to Rev. H 1/2008Rev. C to Rev. D Changes to Figure 2 and Table 3 ..................................................... 6 Changes to Figure 28 and Figure 29............................................. 12 Moved Figure 3 ................................................................................. 7 Added Evaluation Board Section ................................................. 28 Changes to Table 4 ............................................................................ 7 Changes to Ordering Guide .......................................................... 33 Change to Figure 45 ....................................................................... 15 Changes to Simple AGC Amplifier Section ................................ 27 6/2006Rev. B to Rev. C Updated Outline Dimensions ....................................................... 32 Updated Format .................................................................. Universal Changes to Ordering Guide .......................................................... 32 Changes to Figure 1 ........................................................................... 1 Deleted Figure 2 Renumbered Sequentially ................................. 1 5/2014Rev. F to Rev. G Changes to Specifications Section ................................................... 3 Changes to Table 1 ............................................................................ 3 Change to Absolute Maximum Ratings ......................................... 5 Changes to Typical Performance Characteristics Summary Statement ............................................................................................ 7 11/2012Rev. E to Rev. F Changes to Figure 1 .......................................................................... 1 Changes to Figure 14 and Figure 15................................................ 8 Changes to Output (Input) Common-Mode Control ............... 20 Changes to Figure 31 and Figure 32............................................. 11 Updated Outline Dimensions ....................................................... 31 Updated Outline Dimensions ....................................................... 28 Changes to Ordering Guide .......................................................... 31 10/2004Rev. A to Rev. B 3/2010Rev. D to Rev. E Changes to Absolute Maximum Ratings Section and Ordering Changes to Figure 2 and Table 3 ..................................................... 6 Guide Section ..................................................................................... 4 Change to TPC 14 ............................................................................. 8 Changes to Figure 69 ...................................................................... 28 Changes to Figure 71 ...................................................................... 29 Note Added to CP-16 Package ...................................................... 26 Changes to Figure 72 ...................................................................... 30 Deleted Table 7 Renumbered Sequentially ................................ 31 4/2003Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 32 Updated Outline Dimensions ....................................................... 26 10/2002Revision 0: Initial Version Rev. H Page 2 of 32