12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9230 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD (1.8V) SNR = 64.9 dBFS f up to 70 MHz 250 MSPS IN ENOB of 10.4 f up to 70 MHz 250 MSPS (1.0 dBFS) IN REFERENCE AD9230 SFDR = 79 dBc f up to 70 MHz 250 MSPS (1.0 dBFS) IN CML DRVDD Excellent linearity DRGND VIN+ DNL = 0.3 LSB typical TRACK-AND-HOLD VIN INL = 0.5 LSB typical ADC 12 OUTPUT 12 12-BIT STAGING D11 TO D0 LVDS at 250 MSPS (ANSI-644 levels) CORE LVDS CLK+ 700 MHz full power analog bandwidth CLOCK OR+ MANAGEMENT CLK OR On-chip reference, no external decoupling required Integrated input buffer and track-and-hold SERIAL PORT DCO+ Low power dissipation DCO 434 mW 250 MSPSLVDS SDR mode RESET SCLK SDIO CSB 400 mW 250 MSPSLVDS DDR mode Figure 1. Functional Block Diagram Programmable input voltage range 1.0 V to 1.5 V, 1.25 V nominal 1.8 V analog and digital supply operation Selectable output data format (offset binary, twos complement, Gray code) Clock duty cycle stabilizer Integrated data capture clock APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearization GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD9230 is a 12-bit monolithic sampling analog-to-digital 1. High PerformanceMaintains 64.9 dBFS SNR 250 MSPS converter optimized for high performance, low power, and ease with a 70 MHz input. of use. The product operates at up to a 250 MSPS conversion 2. Low PowerConsumes only 434 mW 250 MSPS. rate and is optimized for outstanding dynamic performance in 3. Ease of UseLVDS output data and output clock signal wideband carrier and broadband systems. All necessary allow interface to current FPGA technology. The on-chip functions, including a track-and-hold (T/H) and voltage reference and sample and hold provide flexibility in system reference, are included on the chip to provide a complete signal design. Use of a single 1.8 V supply simplifies system conversion solution. power supply design. The ADC requires a 1.8 V analog voltage supply and a 4. Serial Port ControlStandard serial port interface supports differential clock for full performance operation. The digital various product functions, such as data formatting, disabling outputs are LVDS (ANSI-644) compatible and support either the clock duty cycle stabilizer, power-down, gain adjust, twos complement, offset binary format, or Gray code. A data and output test pattern generation. clock output is available for proper output data timing. 5. Pin-Compatible Family10-bit pin-compatible family Fabricated on an advanced CMOS process, the AD9230 is offered as AD9211. available in a 56-lead LFCSP, specified over the industrial temperature range (40C to +85C). Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 06002-001AD9230 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 21 Applications....................................................................................... 1 Analog Input and Voltage Reference ....................................... 21 Functional Block Diagram .............................................................. 1 Clock Input Considerations...................................................... 22 General Description ......................................................................... 1 Power Dissipation and Power-Down Mode ........................... 23 Product Highlights ........................................................................... 1 Digital Outputs ........................................................................... 23 Revision History ............................................................................... 2 Timing ......................................................................................... 24 Specifications..................................................................................... 3 RBIAS........................................................................................... 24 DC Specifications ......................................................................... 3 AD9230 Configuration Using the SPI..................................... 24 AC Specifications.......................................................................... 4 Hardware Interface..................................................................... 25 Digital Specifications ................................................................... 5 Configuration Without the SPI ................................................ 25 Switching Specifications .............................................................. 6 Memory Map .................................................................................. 27 Timing Diagrams.......................................................................... 7 Reading the Memory Map Table.............................................. 27 Absolute Maximum Ratings............................................................ 8 Reserved Locations .................................................................... 27 Thermal Resistance ...................................................................... 8 Default Values ............................................................................. 27 ESD Caution.................................................................................. 8 Logic Levels................................................................................. 27 Pin Configurations and Function Descriptions ........................... 9 Outline Dimensions....................................................................... 30 Equivalent Circuits ......................................................................... 13 Ordering Guide .......................................................................... 30 Typical Performance Characteristics ........................................... 14 REVISION HISTORY 2/07Revision 0: Initial Version Rev. 0 Page 2 of 32