16-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) AD9268 FEATURES FUNCTIONAL BLOCK DIAGRAM SDIO/ SCLK/ SNR = 78.2 dBFS 70 MHz and 125 MSPS AVDD CSB DRVDD DCS DFS SFDR = 88 dBc 70 MHz and 125 MSPS Low power: 750 mW 125 MSPS SPI AD9268 1.8 V analog supply operation ORA 1.8 V CMOS or LVDS output supply PROGRAMMING DATA D15A (MSB) VIN+A Integer 1-to-8 input clock divider 16 CMOS/LVDS ADC TO OUTPUT BUFFER IF sampling frequencies to 300 MHz VINA D0A (LSB) 153.6 dBm/Hz small-signal input noise with 200 input CLK+ DIVIDE 1 impedance 70 MHz and 125 MSPS VREF TO 8 CLK Optional on-chip dither SENSE DCOA Programmable internal ADC voltage reference DUTY CYCLE DCO REF STABILIZER GENERATION DCOB Integrated ADC sample-and-hold inputs VCM SELECT Flexible analog input range: 1 V p-p to 2 V p-p RBIAS ORB Differential analog inputs with 650 MHz bandwidth D15B (MSB) VINB 16 CMOS/LVDS TO ADC clock duty cycle stabilizer ADC OUTPUT BUFFER VIN+B D0B (LSB) 95 dB channel isolation/crosstalk MULTICHIP Serial port control SYNC User-configurable, built-in self-test (BIST) capability AGND SYNC PDWN OEB Energy-saving power-down modes NOTES 1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY SEE FIGURE 7 FOR LVDS PIN NAMES. APPLICATIONS Figure 1. Communications Diversity radio systems PRODUCT HIGHLIGHTS Multimode digital receivers (3G) 1. On-chip dither option for improved SFDR performance GSM, EDGE, W-CDMA, LTE, with low power analog input. CDMA2000, WiMAX, TD-SCDMA 2. Proprietary differential input that maintains excellent SNR I/Q demodulation systems performance for input frequencies up to 300 MHz. Smart antenna systems 3. Operation from a single 1.8 V supply and a separate digital General-purpose software radios output driver supply accommodating 1.8 V CMOS or Broadband data applications LVDS outputs. Ultrasound equipment 4. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode. 5. Pin compatibility with the AD9258, allowing a simple migration from 16 bits to 14 bits. The AD9268 is also pin compatible with the AD9251, AD9231, and AD9204 family of products for lower sample rate, low power applications. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08123-001AD9268 TABLE OF CONTENTS Features .............................................................................................. 1 Clock Input Considerations ...................................................... 30 Applications ....................................................................................... 1 Channel/Chip Synchronization ................................................ 31 Functional Block Diagram .............................................................. 1 Power Dissipation and Standby Mode .................................... 32 Product Highlights ........................................................................... 1 Digital Outputs ........................................................................... 32 Revision History ............................................................................... 2 Timing ......................................................................................... 33 General Description ......................................................................... 3 Built-In Self-Test (BIST) and Output Test .................................. 34 Specif icat ions ..................................................................................... 4 Built-In Self-Test (BIST) ............................................................ 34 ADC DC Specifications ............................................................... 4 Output Test Modes ..................................................................... 34 ADC AC Specifications ................................................................. 6 Serial Port Interface (SPI) .............................................................. 35 Digital Specifications ................................................................... 7 Configuration Using the SPI ..................................................... 35 Switching Specifications ................................................................ 9 Hardware Interface ..................................................................... 36 Timing Specifications ................................................................ 10 Configuration Without the SPI ................................................ 36 Absolute Maximum Ratings .......................................................... 12 SPI Accessible Features .............................................................. 36 Thermal Characteristics ............................................................ 12 Memory Map .................................................................................. 37 ESD Caution ................................................................................ 12 Reading the Memory Map Register Table ............................... 37 Pin Configurations and Function Descriptions ......................... 13 Memory Map Register Table ..................................................... 38 Typical Performance Characteristics ........................................... 17 Memory Map Register Descriptions ........................................ 40 Equivalent Circuits ......................................................................... 25 Applications Information .............................................................. 41 Theory of Operation ...................................................................... 26 Design Guidelines ...................................................................... 41 ADC Architecture ...................................................................... 26 Outline Dimensions ....................................................................... 42 Analog Input Considerations .................................................... 26 Ordering Guide .......................................................................... 42 Voltage Reference ....................................................................... 29 REVISION HISTORY 9/09Rev. 0 to Rev. A Changes to Features List .................................................................. 1 Changes to Specifications Section .................................................. 4 Changes to Table 5 .......................................................................... 10 Changes to Typical Performance Characteristics Section ......... 17 5/09Revision 0: Initial Version Rev. A Page 2 of 44