16-Bit, 250 MSPS Analog-to-Digital Converter Enhanced Product AD9467-EP FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 AVDD3 SPIVDD DRVDD 75.5 dBFS SNR to 210 MHz at 250 MSPS (1.8V) (3.3V) (1.8V) (1.8V TO 3.3V) (1.8V) 90 dBFS SFDR to 300 MHz at 250 MSPS CSB AD9467-EP SDIO 60 fs rms jitter BUFFER SCLK Excellent linearity at 250 MSPS 16 VIN+ PIPELINE 2 DNL = 0.5 LSB typical OR+/OR ADC VIN LVDS OUTPUT D15+/D15 INL = 3.5 LSB typical 16 STAGING TO 2 V p-p to 2.5 V p-p (default) differential full-scale D0+/D0 CLK+ CLOCK 2 input (programmable) AND TIMING DCO+/DCO CLK MANAGEMENT REF Integrated input buffer External reference support option AGND XVREF DRGND Clock duty cycle stabilizer Figure 1. Output clock available Serial port control Built-in selectable digital test pattern generation Selectable output data format LVDS outputs (ANSI-644 compatible) 1.8 V and 3.3 V supply operation ENHANCED PRODUCT FEATURES A data clock output (DCO) for capturing data on the output is provided for signaling a new output bit. The internal power- Extended temperature range (55C to +125C) down feature, when enabled via the serial port interface (SPI), Controlled manufacturing baseline typically consumes less than 5 mW. Qualification data available on request Optional features allow users to implement various selectable APPLICATIONS operating conditions, including input range, data format select, Multicarrier, multimode cellular receivers and output data test patterns. Antenna array positioning The AD9467-EP is available in a Pb-free, 72-lead, LFCSP specified Power amplifier linearization over the 55C to +125C extended temperature range. Broadband wireless Additional application and technical information can be found Radar in the AD9467 data sheet. Infrared imaging Communications instrumentation PRODUCT HIGHLIGHTS GENERAL DESCRIPTION 1. IF optimization capability used to improve SFDR. 2. Outstanding SFDR performance for IF sampling The AD9467-EP is a 16-bit, monolithic, IF sampling analog-to- applications such as multicarrier, multimode 3G, and 4G digital converter (ADC). It is optimized for high performance cellular base station receivers. over wide bandwidths and ease of use. The product operates at a 3. Ease of use: on-chip reference, high input impedance 250 MSPS conversion rate and is designed for wireless receivers, buffer, adjustable analog input range, and an output clock instrumentation, and test equipment that require a high to simplify data capture. dynamic range. 4. Packaged in a Pb-free, 72-lead LFCSP package. The ADC requires 1.8 V and 3.3 V power supplies and a low 5. Clock duty cycle stabilizer (DCS) maintains overall ADC voltage differential input clock for full performance operation. performance over a wide range of input clock pulse widths. No external reference or driver components are required for 6. Standard SPI supports various product features and functions, many applications. Data outputs are LVDS-compatible (ANSI-644- such as data formatting (offset binary, twos complement, or compatible) and include the means to reduce the overall current Gray coding). needed for short trace distances. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2016 Analog Devices, Inc. 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Technical Support www.analog.com 14751-001AD9467-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 Digital Specifications ....................................................................6 Enhanced Product Features ............................................................ 1 Switching Specifications ...............................................................7 Applications ....................................................................................... 1 Absolute Maximum Ratings ............................................................8 General Description ......................................................................... 1 Thermal Impedance ......................................................................8 Functional Block Diagram .............................................................. 1 ESD Caution...................................................................................8 Product Highlights ........................................................................... 1 Pin Configuration and Function Descriptions ..............................9 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 11 Specifications ..................................................................................... 3 Outline Dimensions ....................................................................... 15 AC Specifications .......................................................................... 4 Ordering Guide .......................................................................... 15 REVISION HISTORY 7/2016Revision 0: Initial Version Rev. 0 Page 2 of 15