12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9626 FEATURES APPLICATIONS SNR = 64.8 dBFS f up to 70 MHz 250 MSPS Wireless and wired broadband communications IN ENOB of 10.5 f up to 70 MHz 250 MSPS (1.0 dBFS) Cable reverse path IN SFDR = 80 dBc f up to 70 MHz 250 MSPS (1.0 dBFS) Communications test equipment IN Excellent linearity Radar and satellite subsystems DNL = 0.3 LSB typical Power amplifier linearization INL = 0.7 LSB typical FUNCTIONAL BLOCK DIAGRAM CMOS outputs RBIAS PWDN AGND AVDD (1.8V) Single data port at up to 250 MHz Interleaved dual port sample rate up to 125 MHz REFERENCE AD9626 700 MHz full power analog bandwidth CML DRVDD On-chip reference, no external decoupling required DRGND VIN+ Integrated input buffer and track-and-hold TRACK-AND-HOLD VIN Low power dissipation ADC 12 OUTPUT 12 12-BIT STAGING Dx11 TO Dx0 272 mW 170 MSPS CORE LVDS 364 mW 250 MSPS CLK+ CLOCK OVRA MANAGEMENT CLK Programmable input voltage range OVRB 1.0 V to 1.5 V, 1.25 V nominal SERIAL PORT 1.8 V analog and digital supply operation DCO+ DCO Selectable output data format (offset binary, twos complement, Gray code) RESET SCLK SDIO CSB Clock duty cycle stabilizer Figure 1. Integrated data capture clock GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD9626 is a 12-bit monolithic sampling analog-to-digital 1. High PerformanceMaintains 64.9 dBFS SNR 250 MSPS converter optimized for high performance, low power, and ease with a 70 MHz input. of use. The product operates at up to a 250 MSPS conversion 2. Low PowerConsumes only 364 mW 250 MSPS. rate and is optimized for outstanding dynamic performance in 3. Ease of UseCMOS output data and output clock signal wideband carrier and broadband systems. All necessary func- allow interface to current FPGA technology. The on-chip tions, including a track-and-hold (T/H) and voltage reference, reference and sample-and-hold provide flexibility in are included on the chip to provide a complete signal system design. Use of a single 1.8 V supply simplifies conversion solution. system power supply design. The ADC requires a 1.8 V analog voltage supply and a differen- 4. Serial Port ControlStandard serial port interface supports tial clock for full performance operation. The digital outputs are various product functions, such as data formatting, clock CMOS compatible and support either twos complement, offset duty cycle stabilizer, power-down, gain adjust, and output binary format, or Gray code. A data clock output is available for test pattern generation. proper output data timing. 5. Pin-Compatible Family10-bit pin-compatible family Fabricated on an advanced CMOS process, the AD9626 is offered as the AD9601. available in a 56-lead LFCSP, specified over the industrial temperature range (40C to +85C). Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 07099-001AD9626 TABLE OF CONTENTS Features .............................................................................................. 1 Clock Input Considerations...................................................... 19 Applications....................................................................................... 1 Power Dissipation and Power-Down Mode ........................... 20 Functional Block Diagram .............................................................. 1 Digital Outputs ........................................................................... 20 General Description ......................................................................... 1 TimingSingle Port Mode....................................................... 21 Product Highlights ........................................................................... 1 TimingInterleaved Mode....................................................... 21 Revision History ............................................................................... 2 Layout Considerations................................................................... 22 Specifications..................................................................................... 3 Power and Ground Recommendations ................................... 22 DC Specifications ......................................................................... 3 CML ............................................................................................. 22 AC Specifications.......................................................................... 4 RBIAS........................................................................................... 22 Digital Specifications ................................................................... 5 AD9626 Configuration Using the SPI..................................... 22 Switching Specifications .............................................................. 6 Hardware Interface..................................................................... 23 Timing Diagrams.......................................................................... 7 Configuration Without the SPI ................................................ 23 Absolute Maximum Ratings............................................................ 8 Memory Map .................................................................................. 25 Thermal Resistance ...................................................................... 8 Reading the Memory Map Table.............................................. 25 ESD Caution.................................................................................. 8 Reserved Locations .................................................................... 25 Pin Configurations and Function Descriptions ........................... 9 Default Values ............................................................................. 25 Equivalent Circuits ......................................................................... 11 Logic Levels................................................................................. 25 Typical Performance Characteristics ........................................... 12 Evaluation Board ............................................................................ 27 Theory of Operation ...................................................................... 18 Outline Dimensions ....................................................................... 33 Analog Input and Voltage Reference ....................................... 18 Ordering Guide .......................................................................... 33 REVISION HISTORY 11/07Revision 0: Initial Version Rev. 0 Page 2 of 36