14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter (ADC) Data Sheet AD9642 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD SNR = 71.0 dBFS at 185 MHz A and 250 MSPS IN SFDR = 83 dBc at 185 MHz A and 250 MSPS IN VIN+ PIPELINE D0/D1 152.0 dBFS/Hz input noise at 200 MHz, 1 dBFS A , 250 MSPS 14 IN 14-BIT VIN ADC Total power consumption: 390 mW at 250 MSPS PARALLEL VCM AD9642 1.8 V supply voltages DDR LVDS AND LVDS (ANSI-644 levels) outputs D12/D13 DRIVERS Integer 1-to-8 input clock divider (625 MHz maximum input) Sample rates of up to 250 MSPS DCO REFERENCE Internal ADC voltage reference Flexible analog input range 1-TO-8 1.4 V p-p to 2.0 V p-p (1.75 V p-p nominal) SERIAL PORT CLOCK DIVIDER ADC clock duty cycle stabilizer Serial port control Energy saving power-down modes SCLK SDIO CSB CLK+ CLK Figure 1. APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMAX, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Ultrasound equipment Broadband data applications GENERAL DESCRIPTION The AD9642 is a 14-bit analog-to-digital converter (ADC) with Programming for setup and control is accomplished using a sampling speeds of up to 250 MSPS. The AD9642 is designed to 3-wire SPI-compatible serial interface. support communications applications, where low cost, small The AD9642 is available in a 32-lead LFCSP and is specified size, wide bandwidth, and versatility are desired. over the industrial temperature range of 40C to +85C. This The ADC core features a multistage, differential pipelined product is protected by a U.S. patent. architecture with integrated output error correction logic. The PRODUCT HIGHLIGHTS ADC features wide bandwidth inputs that can support a variety 1. Integrated 14-bit, 170 MSPS/210 MSPS/250 MSPS ADC. of user-selectable input ranges. An integrated voltage reference 2. Operation from a single 1.8 V supply and a separate digital eases design considerations. A duty cycle stabilizer (DCS) is output driver supply accommodating LVDS outputs. provided to compensate for variations in the ADC clock duty 3. Proprietary differential input maintains excellent SNR cycle, allowing the converter to maintain excellent performance. performance for input frequencies of up to 350 MHz. The ADC output data is routed directly to the external 4. 3-pin, 1.8 V SPI port for register programming and readback. 14-bit LVDS output port. 5. Pin compatibility with the AD9634, allowing a simple migra- Flexible power-down options allow significant power savings, tion from 14 bits to 12 bits, and with the AD6672. when desired. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 09995-001AD9642 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 17 Applications ....................................................................................... 1 ADC Architecture ...................................................................... 17 Functional Block Diagram .............................................................. 1 Analog Input Considerations ................................................... 17 General Description ......................................................................... 1 Voltage Reference ....................................................................... 19 Product Highlights ........................................................................... 1 Clock Input Considerations ...................................................... 19 Revision History ............................................................................... 2 Power Dissipation and Standby Mode .................................... 20 Specifications ..................................................................................... 3 Digital Outputs ........................................................................... 20 ADC DC Specifications ............................................................... 3 Serial Port Interface (SPI) .............................................................. 22 ADC AC Specifications ............................................................... 4 Configuration Using the SPI ..................................................... 22 Digital Specifications ................................................................... 5 Hardware Interface ..................................................................... 22 Switching Specifications .............................................................. 6 SPI Accessible Features .............................................................. 23 Timing Specifications .................................................................. 7 Memory Map .................................................................................. 24 Absolute Maximum Ratings ............................................................ 8 Reading the Memory Map Register Table ............................... 24 Thermal Characteristics .............................................................. 8 Memory Map Register Table ..................................................... 25 ESD Caution .................................................................................. 8 Applications Information .............................................................. 27 Pin Configurations and Function Descriptions ........................... 9 Design Guidelines ...................................................................... 27 Typical Performance Characteristics ........................................... 10 Outline Dimensions ....................................................................... 28 Equivalent Circuits ......................................................................... 16 Ordering Guide .......................................................................... 28 REVISION HISTORY 1/15Rev. A to Rev. B Changes to Features Section............................................................ 1 Changes to Reading the Memory Map Register Table Section .............................................................................................. 24 Changes to Table 13 ........................................................................ 26 7/14Rev. 0 to Rev. A Changes to Features Section............................................................ 1 Changes to Full Power Bandwidth Parameter, Table 2 ................ 5 Deleted Noise Bandwidth Parameter, Table 2............................... 5 7/11Revision 0: Initial Version Rev. B Page 2 of 28