Complete 12-Bit 30 MSPS CCD Signal Processor AD9845B FEATURES GENERAL DESCRIPTION Pin Compatible with AD9845A Designs The AD9845B is an improved version of the AD9845A CCD 12-Bit 30 MSPS A/D Converter signal processor. It features a 30 MHz single-channel architec- 30 MSPS Correlated Double Sampler (CDS) ture designed to sample and condition the outputs of interlaced 4 dB 6 dB 6-Bit Pixel Gain Amplifier (PxGA ) and progressive scan area CCD arrays. The AD9845Bs signal 2 dB to 36 dB 10-Bit Variable Gain Amplifier (VGA) chain consists of an input clamp, a correlated double sampler Low Noise Clamp Circuits (CDS), PxGA, a digitally controlled VGA, a black level clamp, Preblanking Function and a 12-bit A/D converter. Additional input modes are also Auxiliary Inputs with VGA and Input Clamp provided for processing analog video signals. 3-Wire Serial Digital Interface The internal registers are programmed through a 3-wire 3 V Single-Supply Operation serial digital interface. Programmable features include gain Low Power: 153 mW 3 V Supply adjustment, black level adjustment, input configuration, and Space-Saving 48-Lead LQFP Package power-down modes. APPLICATIONS The AD9845B operates from a single 3 V power supply, typi- High Performance Digital Still Cameras cally dissipates 153 mW, and is packaged in a 48-lead LQFP. Industrial/Scientific Imaging FUNCTIONAL BLOCK DIAGRAM AVDD AVSS HD VD VRT VRB PBLK COLOR BAND GAP DRVDD STEERING REFERENCE 4dB 6dB DRVSS 2dB~36dB CDS PxGA CCDIN 12 2:1 VGA ADC DOUT MUX CLP 6 CLP CLPDM 10 AUX1IN CLPOB 2:1 BUF MUX AUX2IN BLK CLAMP 8 LEVEL CONTROL REGISTERS CLP DVDD DIGITAL INTERNAL DVSS INTERFACE TIMING AD9845B SL SCK SDATA SHP SHD DATACLK REV.B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. Fax: 781/326-8703 2006 Analog Devices, Inc. All rights reserved.AD9845BSPECIFICATIONS GENERAL SPECIFICATIONS (T to T , AVDD = DVDD = 3.0 V, f = 30 MHz, unless otherwise noted.) MIN MAX DATACLK Parameter Min Typ Max Unit TEMPERATURE RANGE Operating 20 +85 C Storage 65 +150 C POWER SUPPLY VOLTAGE Analog, Digital, Digital Driver 2.7 3.6 V POWER CONSUMPTION Normal Operation (Specified under Each Mode of Operation) Power-Down Modes Standby 5 mW Total Power-Down 0.5 mW MAXIMUM CLOCK RATE 30 MHz A/D CONVERTER Resolution 12 Bits Differential Nonlinearity (DNL) 0.5 1.0 LSB No Missing Codes 12 Bits Guaranteed Full-Scale Input Voltage 2.0 V Data Output Coding Straight Binary VOLTAGE REFERENCE Reference Top Voltage (VRT) 2.0 V Reference Bottom Voltage (VRB) 1.0 V Specifications subject to change without notice. DIGITAL SPECIFICATIONS (DRVDD = 2.7 V, C = 20 pF, unless otherwise noted.) L Parameter Symbol Min Typ Max Unit LOGIC INPUTS High Level Input Voltage V 2.1 V IH Low Level Input Voltage V 0.6 V IL High Level Input Current I 10 mA IH Low Level Input Current I 10 mA IL Input Capacitance C 10 pF IN LOGIC OUTPUTS High Level Output Voltage, I = 2 mA V 2.2 V OH OH Low Level Output Voltage, I = 2 mA V 0.5 V OL OL Specifications subject to change without notice. 2 REV. B