16-Bit, 1 MSPS, 8-Channel, Data Acquisition System Data Sheet ADAS3022 and buffer and a 16-bit charge redistribution analog-to-digital FEATURES converter (ADC) with successive approximation register (SAR) Ease of use16-bit, 1 MSPS complete data acquisition system architecture. The ADAS3022 can resolve eight single-ended High impedance, 8-channel input: >500 M inputs or four fully differential inputs up to 24.576 V when Differential input voltage range: 24.576 V maximum using 15 V supplies. In addition, the device can accept the High input common-mode rejection: >100 dB commonly used bipolar differential, bipolar single-ended, User-programmable input ranges pseudo bipolar, or pseudo unipolar input signals, as shown Channel sequencer with individual channel gains in Table 1, thus enabling the use of almost any direct sensor On-chip 4.096 V reference and buffer interface. Auxiliary inputdirect interface to PulSAR ADC inputs No latency or pipeline delay (SAR architecture) The ADAS3022 simplifies design challenges by eliminating Serial 4-wire, 1.8 V to 5 V SPI-/SPORT-compatible interface signal buffering, level shifting, amplification/attenuation, LFCSP package (6 mm 6 mm) common-mode rejection, settling time, and any other analog LQFP package (7 mm 7 mm) signal conditioning challenge while allowing a smaller form 40C to +85C industrial temperature range factor, faster time to market, and lower cost. APPLICATIONS Table 1. Typical Input Range Selection Multichannel data acquisition and system monitoring Signal Input Range, V IN Process control Differential Power line monitoring 1 V 1.28 V Automated test equipment 2.5 V 2.56 V Instrumentation 5 V 5.12 V GENERAL DESCRIPTION 10 V 10.24 V 1 Single Ended The ADAS3022 is a complete 16-bit, 1 MSPS, successive approxi- 0 V to 1 V 1.28 V mation based analog-to-digital data acquisition system, which is 0 V to 2.5 V 2.56 V manufactured on Analog Devices, Inc., proprietary iCMOS high 0 V to 5 V 5.12 V voltage industrial process technology. The device integrates an 0 V to 10 V 10.24 V 8-channel, low leakage multiplexer a high impedance program- mable gain instrumentation amplifier (PGIA) stage with high 1 See Figure 60 and Figure 61 in the Analog Inputs section for more common-mode rejection a precision, low drift 4.096 V reference information. FUNCTIONAL BLOCK DIAGRAM AVDD DVDD VIO RESET PD VDDH DIFF DIFF TO PAIR COM ADAS3022 CNV LOGIC/ IN0/IN1 BUSY IN0 INTERFACE IN1 CS IN2/IN3 IN2 IN3 SCK PulSAR PGIA MUX IN4 ADC IN4/IN5 DIN IN5 IN6 SDO IN6/IN7 IN7 TEMP COM SENSOR BUF REFIN AUX+ REF AUX VSSH AGND DGND REFx Figure 1. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 10516-001ADAS3022 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Application Connection Diagram .............................. 26 Applications ....................................................................................... 1 Analog Inputs.............................................................................. 27 General Description ......................................................................... 1 Voltage Reference Output/Input .............................................. 30 Functional Block Diagram .............................................................. 1 Power Supply ............................................................................... 31 Revision History ............................................................................... 2 Conversion Modes ..................................................................... 32 Specifications ..................................................................................... 3 Digital Interface .............................................................................. 33 Timing Specifications .................................................................. 7 Conversion Control ................................................................... 33 Absolute Maximum Ratings ............................................................ 9 Reset and Power-Down (PD) Inputs ....................................... 33 ESD Caution .................................................................................. 9 Serial Data Interface ................................................................... 34 Pin Configuration and Function Descriptions ........................... 10 General Considerations ............................................................. 35 Typical Performance Characteristics ........................................... 12 General Timing........................................................................... 36 Terminology .................................................................................... 22 Configuration Register .............................................................. 38 Theory of Operation ...................................................................... 24 On Demand Conversion Mode ................................................ 39 Overview ...................................................................................... 24 Channel Sequencer Details ....................................................... 39 Operation ..................................................................................... 24 Outline Dimensions ....................................................................... 42 Transfer Function ....................................................................... 25 Ordering Guide .......................................................................... 42 REVISION HISTORY 4/2013Rev. A to Rev. B 8/2018Rev. C to Rev. D Changes to Table 1 ............................................................................. 1 Added LQFP Package .................................................... Throughout Added Input Impedance of 500 M Min, Table 2 ........................ 3 Changes to Table 1 ............................................................................ 5 Changes to Table 3 ............................................................................ 7 1/2013Rev. 0 to Rev. A Changes to Figure 5, Figure 5 Caption, and Table 5 .................. 11 Removed Endnote 3 and Added T = 25C to Gain Error Test A Added Figure 6 Renumbered Sequentially and Table 6 Conditions/Comments, Table 2....................................................... 3 Renumbered Sequentially .............................................................. 13 Changes to REF1 and REF2 Description .................................... 11 Changed ADAS3022 Operation Section to Operation Section ..... 25 Added Figure 25 to Figure 28 Renumbered Sequentially ........ 15 Changes to Operation Section ...................................................... 25 Changes to Figure 29 ...................................................................... 15 Updated Outline Dimensions ....................................................... 43 Added Figure 30 ............................................................................. 16 Changes to Ordering Guide .......................................................... 43 Changes to Figure 33, Figure 34, and Figure 35 ......................... 16 Changes to Figure 36 and Figure 37 ............................................ 17 2/2014Rev. B to Rev. C Changes to Figure 50 ...................................................................... 19 Change to Figure 49 ....................................................................... 19 Changes to Figure 54 ...................................................................... 24 Change to Figure 54 ....................................................................... 24 Changes to Figure 56 ...................................................................... 25 Change to Table 7 ........................................................................... 25 Changes to Figure 57, Figure 58, Figure 59, and Figure 60 ....... 26 Changes to Power-Down Mode Section ...................................... 30 Changes to Voltage Reference Output/Input Section, Figure 62, Added On Demand Conversion Mode Section and Table 12 and Figure 63 ................................................................................... 28 Renumbered Sequentially .............................................................. 37 Changes to Core Supplies Section ................................................ 29 Change to Table 13 ......................................................................... 37 Change to JEDEC Note, Figure 75 ............................................... 40 11/2012Revision 0: Initial Version Rev. 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