500 MHz Dual Integrated DCL with Differential Drive/Receive, Level Setting DACs, and Per Pin PMU ADATE302-02 FEATURES GENERAL DESCRIPTION Driver The ADATE302-02 is a complete, single-chip solution that 3-level driver with high-Z mode and built-in clamps performs the pin electronic functions of the driver, the compa- Precision trimmed output resistance rator, and the active load (DCL), per pin PMU, and dc levels for Low leakage mode (typically <10 nA) ATE applications. The device also contains an HVOUT driver Voltage range: 2.0 V to +6.0 V with a VHH buffer capable of generating up to 13.5 V. 1.0 ns minimum pulse width, 1 V terminated The driver features three active states: data high mode, data low Comparator mode, and term mode, as well as an inhibit state. The inhibit Window and differential comparator state, in conjunction with the integrated dynamic clamp, facilitates >1 GHz input equivalent bandwidth the implementation of a high speed active termination. The output Load 12 mA maximum current capability voltage range is 2.0 V to +6.0 V to accommodate a wide Per pin PMU variety of test devices. Force voltage range: 2.0 V to +6.0 V The ADATE302-02 can be used as either a dual single-ended 5 current ranges: 25 mA, 2 mA, 200 A, 20 A, and 2 A drive/receive channel or a single differential drive/receive Levels channel. Each channel of the ADATE302-02 features a high 14-bit DAC for DCL levels speed window comparator for functional testing as well as a per Typically <5 mV INL (calibrated) pin PMU with FV or FI and MV or MI functions. All necessary 16-bit DAC for PMU levels dc levels for DCL functions are generated by on-chip 14-bit Typically <1.5 mV INL (calibrated) linearity in FV mode DACs. The per pin PMU features an on-chip 16-bit DAC for HVOUT output buffer high accuracy and contains integrated range resistors to 0 V to 13.5 V output range Packages minimize external component counts. 84-ball, 9 mm 9 mm, flip-chip BGA The ADATE302-02 uses a serial bus to program all functional 100-lead TQFP EP blocks and has an on-board temperature sensor for monitoring 1.7 W per channel with no load the device temperature. APPLICATIONS Automatic test equipment Semiconductor test systems Board test systems Instrumentation and characterization equipment Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 20082009 Analog Devices, Inc. All rights reserved. ADATE302-02 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ......................................................... 20 Applications ....................................................................................... 1 Thermal Resistance .................................................................... 20 General Description ......................................................................... 1 Explanation of Test Levels ......................................................... 20 Revision History ............................................................................... 2 ESD Caution................................................................................ 20 Functional Block Diagram .............................................................. 3 Pin Configuration and Function Descriptions ........................... 21 Specif ications ..................................................................................... 4 Typical Performance Characteristics ........................................... 27 Total Function ............................................................................... 4 Serial Peripheral Interface Details ................................................ 39 Driver ............................................................................................. 5 Definition of SPI Word .............................................................. 40 Reflection Clamp .......................................................................... 7 Write Operation.......................................................................... 41 Normal Window Comparator .................................................... 7 Read Operation .......................................................................... 42 Differential Comparator .............................................................. 9 Reset Operation .......................................................................... 43 Active Load .................................................................................. 11 Register Map ................................................................................... 44 PMU ............................................................................................. 12 Details of Registers ......................................................................... 45 External Sense (PMUS CHx) ................................................... 16 User Information ............................................................................ 47 DUTGND Input ......................................................................... 17 Details of DACs vs. Levels ......................................................... 48 Serial Peripheral Interface ......................................................... 17 Recommended PMU Mode Switching Sequences ................ 50 HVOUT Driver ........................................................................... 17 Block Diagrams ............................................................................... 53 Overvoltage Detector (OVD) ................................................... 18 Outline Dimensions ....................................................................... 57 16-Bit DAC Monitor Mux ......................................................... 19 Ordering Guide .......................................................................... 58 REVISION HISTORY 4/09Rev. 0 to Rev. A Added 100-Lead TQFP EP Package ........................... Throughout Added Figure 3, Renumbered Figures Sequentially ................... 22 Added Table 17, Renumbered Tables Sequentially .................... 22 Updated Outline Dimensions ....................................................... 52 Changes to Ordering Guide .......................................................... 53 6/08Revision 0: Initial Version Rev. A Page 2 of 58