X-On Electronics has gained recognition as a prominent supplier of ADAU1787BCBZRL7 Interface - CODECs across the USA, India, Europe, Australia, and various other global locations. ADAU1787BCBZRL7 Interface - CODECs are a product manufactured by Analog Devices. We provide cost-effective solutions for Interface - CODECs, ensuring timely deliveries around the world.

ADAU1787BCBZRL7 Analog Devices

ADAU1787BCBZRL7 electronic component of Analog Devices
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Part No.ADAU1787BCBZRL7
Manufacturer: Analog Devices
Category: Interface - CODECs
Description: Interface - CODECs 4 ADC 2 DAC Low Power CODEC Audio DSPs
Datasheet: ADAU1787BCBZRL7 Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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1 : USD 26.5481
10 : USD 24.4924
25 : USD 22.4953
100 : USD 20.1063
250 : USD 19.1847
500 : USD 18.7239
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Four ADC, Two DAC, Low Power Codec with Audio DSPs Data Sheet ADAU1787 FEATURES Digital DVDD at 0.9 V typical Low power (11.079 mW for typical stereo ANC settings) Programmable FastDSP audio processing engine 2 2 I C and SPI control interfaces, self boot from I C EEPROM Up to 768 kHz sample rate Flexible GPIO Biquad filters, limiters, volume controls, mixing 42-ball, 0.35 mm pitch, 2.695 mm 2.320 mm WLCSP 28-bit SigmaDSP audio processing core Visually programmable using SigmaStudio APPLICATIONS Up to 50 MIPS performance Noise cancelling handsets, headsets, and headphones Low latency, 24-bit ADCs and DACs Bluetooth ANC handsets, headsets, and headphones 96 dB SNR (signal through PGA and ADC with A-weighted Personal navigation devices filter) Digital still and video cameras 105 dB combined SNR (signal through DAC and headphone Musical instrument effect processors with A-weighted filter) Multimedia speaker systems Serial port f frequency from 8 kHz to 768 kHz SYNC Smartphones 5 s group delay (f = 768 kHz) analog in to analog out with S FastDSP bypass (zero instructions) GENERAL DESCRIPTION 4 single-ended analog inputs, configurable as microphone The ADAU1787 is a codec with four inputs and two outputs or line inputs that incorporates two digital signal processors (DSPs). The path 8 digital microphone inputs from the analog input to the DSP core to the analog output is 2 analog differential audio outputs, configurable as either optimized for low latency and is ideal for noise cancelling line output or headphone driver headsets. With the addition of just a few passive components, PLL supporting any input clock rate from 30 kHz to 27 MHz the ADAU1787 provides a complete headset solution. Full-duplex, 4-channel ASRCs 2 Note that throughout this data sheet, multifunction pins, such 2, 16-channel serial audio ports supporting I S, left justified, as BCLK 0/MP1, are referred to either by the entire pin name or up to TDM16 or by a single function of the pin, for example, BCLK 0, when 8 interpolators and 8 decimators with flexible routing only that function is relevant. Power supplies Analog AVDD at 1.8 V typical Digital I/O IOVDD at 1.1 V to 1.98 V Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2019-2020 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com ADAU1787 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Interpolation and Decimation Blocks ..................................... 39 Applications ....................................................................................... 1 Signal Levels ................................................................................ 39 General Description ......................................................................... 1 FastDSP Core .................................................................................. 40 Revision History ............................................................................... 5 Instructions ................................................................................. 40 Functional Block Diagram .............................................................. 6 Filter Precision ............................................................................ 40 Specif icat ions ..................................................................................... 7 Flags and Conditional Execution ............................................. 40 Analog Performance Specifications ........................................... 7 Input Sources .............................................................................. 40 Crystal Amplifier Specifications ................................................. 9 Power and Run Control ............................................................. 41 Digital Input and Output Specifications ................................... 9 Data Memory .............................................................................. 41 Power Supply Specifications...................................................... 10 Parameters ................................................................................... 41 Power-Down Current ................................................................ 10 Parameter Bank Switching ........................................................ 41 Typical Power Consumption ..................................................... 10 Parameter Bank Copying .......................................................... 41 Digital Filters ............................................................................... 11 Parameter Memory Access........................................................ 42 Digital Timing Specifications ................................................... 12 FastDSP Parameter Safeload ..................................................... 42 Absolute Maximum Ratings .......................................................... 16 SigmaDSP Core .............................................................................. 43 Thermal Resistance .................................................................... 16 Read/Write Data Formats ......................................................... 44 ESD Caution ................................................................................ 16 Software Safeload ....................................................................... 45 Pin Configuration and Function Descriptions ........................... 17 FastDSP Safeload ........................................................................ 45 Typical Performance Characteristics ........................................... 20 Program RAM, Parameter RAM, and Data RAM ..................... 46 System Block Diagram ................................................................... 27 Program RAM ............................................................................ 46 Theory of Operation ...................................................................... 28 Parameter RAM .......................................................................... 46 System Clocking and Power-Up ................................................... 29 Data RAM ................................................................................... 46 Power-Down Operation and Options ..................................... 29 Power Saving Options .................................................................... 47 Example ADC to DAC Power-up ............................................. 30 Control Port .................................................................................... 49 DVDD LDO Regulator .............................................................. 30 Burst Mode Communication .................................................... 49 Clock Initialization ..................................................................... 30 Reading and Writing to Memories .......................................... 50 2 PLL ............................................................................................... 31 I C Port ........................................................................................ 50 Multichip Phase Synchronization ............................................ 32 SPI Port ........................................................................................ 53 Clock Output ............................................................................... 32 Self Boot ....................................................................................... 54 Power Supply Sequencing ......................................................... 32 Multipurpose Pins ...................................................................... 56 Signal Routing ................................................................................. 33 Serial Data Ports ............................................................................. 57 Input Signal Paths ........................................................................... 34 Applications Information .............................................................. 59 Analog Inputs .............................................................................. 34 Power Supply Bypass Capacitors .............................................. 59 Digital Microphone Inputs ........................................................ 35 Layout .......................................................................................... 59 ADCs ............................................................................................ 36 Grounding ................................................................................... 59 Output Signal Paths ........................................................................ 37 PCB Stackup ................................................................................ 59 Analog Outputs........................................................................... 37 Register Summary .......................................................................... 60 DACs ............................................................................................ 37 Register Details ............................................................................... 67 PDM Outputs .............................................................................. 38 ADI Vendor ID Register ............................................................ 67 ASRCs .......................................................................................... 38 Device ID Registers .................................................................... 67 Rev. A Page 2 of 280

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