Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL Data Sheet ADAU1961 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC: >98 dB SNR The ADAU1961 is a low power, stereo audio codec that supports Sampling rates from 8 kHz to 96 kHz stereo 48 kHz record and playback at 35 mW from a 3.3 V analog Low power: 17 mW record, 18 mW playback, 48 kHz supply. The stereo audio ADCs and DACs support sample rates 6 analog input pins, configurable for single-ended or from 8 kHz to 96 kHz as well as a digital volume control. differential inputs The record path includes an integrated microphone bias circuit Flexible analog input/output mixers and six inputs. The inputs can be mixed and muxed before the Stereo digital microphone input ADC, or they can be configured to bypass the ADC. The Analog outputs: 2 differential stereo, 2 single-ended stereo, ADAU1961 includes a stereo digital microphone input. 1 mono headphone output driver The ADAU1961 includes five high power output drivers (two PLL supporting input clocks from 8 MHz to 27 MHz differential and three single-ended), supporting stereo head- Analog automatic level control (ALC) phones, an earpiece, or other output transducer. AC-coupled Microphone bias reference voltage or capless configurations are supported. Individual fine level Analog and digital I/O: 3.3 V 2 controls are supported on all analog outputs. The output mixer I C and SPI control interfaces stage allows for flexible routing of audio. Digital audio serial data I/O: stereo and time-division 2 multiplexing (TDM) modes The serial control bus supports the I C and SPI protocols. The 2 Software-controllable clickless mute serial audio bus is programmable for I S, left-/right-justified, 32-lead, 5 mm 5 mm LFCSP and TDM modes. A programmable PLL supports flexible clock 40C to +105C operating temperature range generation for all standard integer rates and fractional master Qualified for automotive applications clocks from 8 MHz to 27 MHz. APPLICATIONS Automotive head units Automotive amplifiers Navigation systems Rear-seat entertainment systems FUNCTIONAL BLOCK DIAGRAM HP JACK REGULATOR ADAU1961 JACKDET/MICIN DETECTION LAUX LOUTP LINP LOUTN DAC ADC LHP INPUT LINN ADC DAC MIXERS OUTPUT MONOOUT DIGITAL DIGITAL MIXERS RINP FILTERS FILTERS ALC RHP ADC DAC RINN ROUTP ROUTN RAUX 2 MICROPHONE SERIAL DATA I C/SPI MICBIAS PLL BIAS INPUT/OUTPUT PORTS CONTROL PORT MCLK ADC SDATA DAC SDATA ADDR0/ ADDR1/ SCL/ SDA/ CDATA CCLK COUT CLATCH Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com CM IOVDD BCLK LRCLK DGND DVDDOUT AVDD AVDD AGND AGND 08915-001ADAU1961 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Sampling Rates ............................................................................ 24 Applications ....................................................................................... 1 PLL ............................................................................................... 25 General Description ......................................................................... 1 Record Signal Path ......................................................................... 27 Functional Block Diagram .............................................................. 1 Input Signal Paths ....................................................................... 27 Revision History ............................................................................... 2 Analog-to-Digital Converters ................................................... 29 Specifications ..................................................................................... 3 Automatic Level Control (ALC) ................................................... 30 Analog Performance Specifications, T = 25C ....................... 3 ALC Parameters .......................................................................... 30 A Analog Performance Specifications, 40C < TA < +105C ... 5 Noise Gate Function .................................................................. 31 Power Supply Specifications........................................................ 7 Playback Signal Path ...................................................................... 33 Digital Filters ................................................................................. 8 Output Signal Paths ................................................................... 33 Digital Input/Output Specifications........................................... 8 Headphone Output .................................................................... 34 Digital Timing Specifications ..................................................... 9 Pop-and-Click Suppression ...................................................... 35 Digital Timing Diagrams........................................................... 10 Line Outputs ............................................................................... 35 Absolute Maximum Ratings .......................................................... 12 Control Ports ................................................................................... 36 Thermal Resistance .................................................................... 12 Burst Mode Writing and Reading ............................................ 36 2 ESD Caution ................................................................................ 12 I C Port ........................................................................................ 36 Pin Configuration and Function Descriptions ........................... 13 SPI Port ........................................................................................ 39 Typical Performance Characteristics ........................................... 15 Serial Data Input/Output Ports .................................................... 40 System Block Diagrams ................................................................. 18 Applications Information .............................................................. 42 Theory of Operation ...................................................................... 21 Power Supply Bypass Capacitors .............................................. 42 Startup, Initialization, and Power ................................................. 22 GSM Noise Filter ........................................................................ 42 Power-Up Sequence ................................................................... 22 Grounding ................................................................................... 42 Power Reduction Modes ............................................................ 22 Exposed Pad PCB Design ......................................................... 42 Digital Power Supply .................................................................. 22 Control Registers ............................................................................ 43 Input/Output Power Supply ...................................................... 22 Control Register Details ............................................................ 44 Clock Generation and Management ........................................ 22 Outline Dimensions ....................................................................... 75 Clocking and Sampling Rates ....................................................... 24 Ordering Guide .......................................................................... 75 Core Clock ................................................................................... 24 Automotive Products ................................................................. 75 REVISION HISTORY 4/13Rev. 0 to Rev. A Added Maximum Junction Temperature of 125C .................... 12 Updated Outline Dimensions ....................................................... 75 10/10Revision 0: Initial Version Rev. A Page 2 of 76