Audio Codec for Recordable DVD ADAV801 FEATURES FUNCTIONAL BLOCK DIAGRAM Stereo analog-to-digital converter (ADC) Supports 48 kHz/96 kHz sample rates 102 dB dynamic range Single-ended input PLL CONTROL REGISTERS Automatic level control OLRCLK VINL ANALOG-TO-DIGITAL RECORD Stereo digital-to-analog converter (DAC) OBCLK CONVERTER DATA VINR OUTPUT OSDATA Supports 32 kHz/44.1 kHz/48 kHz/96 kHz/192 kHz REFERENCE SRC DIGITAL VREF OAUXLRCLK INPUT/OUTPUT sample rates AUX DATA SWITCHING MATRIX OAUXBCLK OUTPUT (DATAPATH) OAUXSDATA 101 dB dynamic range VOUTL DIGITAL-TO-ANALOG VOUTR CONVERTER Single-ended output DIT DITOUT Asynchronous operation of ADC and DAC FILTD ZEROL/INT Stereo sample rate converter (SRC) PLAYBACK AUX DATA DIR DATA INPUT INPUT ZEROR ADAV801 Input/output range: 8 kHz to 192 kHz 140 dB dynamic range Digital interfaces Record Playback Figure 1. Auxiliary record Auxiliary playback APPLICATIONS S/PDIF (IEC 60958) input and output DVD-recordable Digital interface receiver (DIR) All formats Digital interface transmitter (DIT) CD-R/W PLL-based audio MCLK generators Generates required DVDR system MCLKs Device control via SPI-compatible serial port 64-lead LQFP package GENERAL DESCRIPTION The ADAV801 is a stereo audio codec intended for applications The sample rate converter (SRC) provides high performance such as DVD or CD recorders that require high performance sample rate conversion to allow inputs and outputs that require and flexible, cost-effective playback and record functionality. different sample rates to be matched. The SRC input can be The ADAV801 features Analog Devices, Inc. proprietary, high selected from playback, auxiliary, DIR, or ADC (record). The performance converter cores to provide record (ADC), playback SRC output can be applied to the playback DAC, both main and (DAC), and format conversion (SRC) on a single chip. The auxiliary record channels, and a DIT. ADAV801 record channel features variable input gain to allow Operation of the ADAV801 is controlled via an SPI-compatible for adjustment of recorded input levels and automatic level serial interface, which allows the programming of individual control, followed by a high performance stereo ADC whose control register settings. The ADAV801 operates from a single digital output is sent to the record interface. The record channel analog 3.3 V power supply and a digital power supply of 3.3 V also features level detectors that can be used in feedback loops with an optional digital interface range of 3.0 V to 3.6 V. to adjust input levels for optimum recording. The playback The part is housed in a 64-lead LQFP package and is character- channel features a high performance stereo DAC with ized for operation over the commercial temperature range of independent digital volume control. 40C to +85C. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20042007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. XIN XOUT MCLKI MCLKO ILRCLK SYSCLK1 IBCLK SYSCLK2 ISDATA SYSCLK3 IAUXLRCLK IAUXBCLK IAUXSDATA DIRIN COUT CIN CCLK CLATCH 04577-001ADAV801 TABLE OF CONTENTS Features .............................................................................................. 1 DAC Section................................................................................ 18 Functional Block Diagram .............................................................. 1 Sample Rate Converter (SRC) Functional Overview ............ 19 Applications....................................................................................... 1 PLL Section ................................................................................. 22 General Description ......................................................................... 1 S/PDIF Transmitter and Receiver ............................................ 23 Revision History ............................................................................... 2 Serial Data Ports ......................................................................... 27 Specifications..................................................................................... 3 Interface Control ............................................................................ 30 Test Conditions............................................................................. 3 SPI Interface................................................................................ 30 ADAV801 Specifications ............................................................. 3 Block Reads and Writes ............................................................. 30 Timing Specifications .................................................................. 7 Register Descriptions ..................................................................... 31 Temperature Range ...................................................................... 7 Layout Considerations................................................................... 58 Absolute Maximum Ratings............................................................ 8 ADC ............................................................................................. 58 ESD Caution.................................................................................. 8 DAC.............................................................................................. 58 Pin Configuration and Function Descriptions............................. 9 PLL ............................................................................................... 58 Typical Performance Characteristics ........................................... 11 Reset and Power-Down Considerations ................................. 58 Functional Description .................................................................. 15 Outline Dimensions ....................................................................... 59 ADC Section ............................................................................... 15 Ordering Guide .......................................................................... 59 REVISION HISTORY 7/07Rev. 0 to Rev. A Changes to Table 1............................................................................ 3 Changes to ADC Section............................................................... 15 Changes to Figure 25...................................................................... 15 Changes to Figure 33...................................................................... 21 Changes to SRC Architecture Section ......................................... 21 Changes to Table 7.......................................................................... 22 Changes to Figure 36...................................................................... 22 Changes to Figure 39 and Figure 42............................................. 23 Changes to Transmitter Operation Section ................................ 27 Changes to Interrupts Section ...................................................... 27 Changes to Figure 50...................................................................... 28 Changes to Table 97........................................................................ 46 Changes to Table 101...................................................................... 47 Changes to Table 136 and Table 137 ............................................ 55 Updated Outline Dimensions ....................................................... 59 Changes to Ordering Guide .......................................................... 59 7/04Revision 0: Initial Version Rev. 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