Audio Codec for Recordable DVD ADAV803 FEATURES FUNCTIONAL BLOCK DIAGRAM Stereo analog-to-digital converter (ADC) Supports 48 kHz/96 kHz sample rates 102 dB dynamic range Single-ended input PLL CONTROL REGISTERS Automatic level control OLRCLK VINL ANALOG-TO-DIGITAL RECORD Stereo digital-to-analog converter (DAC) DATA OBCLK CONVERTER VINR OUTPUT OSDATA Supports 32 kHz/44.1 kHz/48 kHz/96 kHz/192 kHz DIGITAL VREF REFERENCE SRC INPUT/OUTPUT OAUXLRCLK sample rates AUX DATA SWITCHING MATRIX OAUXBCLK OUTPUT (DATA PATH) 101 dB dynamic range OAUXSDATA VOUTL DIGITAL-TO-ANALOG Single-ended output VOUTR CONVERTER DIT DITOUT Asynchronous operation of ADC and DAC FILTD Stereo sample rate converter (SRC) ZEROL/INT PLAYBACK AUX DATA DIR DATA INPUT INPUT ZEROR Input/output range: 8 kHz to 192 kHz ADAV803 140 dB dynamic range Digital interfaces Record Playback Figure 1. Auxiliary record Auxiliary playback APPLICATIONS S/PDIF (IEC 60958) input and output DVD-recordable Digital interface receiver (DIR) All formats Digital interface transmitter (DIT) CD-R/W PLL-based audio MCLK generators Generates required DVDR system MCLKs 2 Device control via I C-compatible serial port 64-lead LQFP package GENERAL DESCRIPTION The ADAV803 is a stereo audio codec intended for applications The sample rate converter (SRC) provides high performance such as DVD or CD recorders that require high performance sample rate conversion to allow inputs and outputs that require and flexible, cost-effective playback and record functionality. different sample rates to be matched. The SRC input can be The ADAV803 features Analog Devices, Inc. proprietary, high selected from playback, auxiliary, DIR, or ADC (record). The performance converter cores to provide record (ADC), SRC output can be applied to the playback DAC, both main and playback (DAC), and format conversion (SRC) on a single chip. auxiliary record channels, and a DIT. Operation of the ADAV803 2 The ADAV803 record channel features variable input gain to is controlled via an I C-compatible serial interface, which allow for adjustment of recorded input levels and automatic allows the programming of individual control register settings. level control, followed by a high performance stereo ADC The ADAV803 operates from a single analog 3.3 V power whose digital output is sent to the record interface. The record supply and a digital power supply of 3.3 V with an optional channel also features level detectors that can be used in digital interface range of 3.0 V to 3.6 V. feedback loops to adjust input levels for optimum recording. The part is housed in a 64-lead LQFP package and is character- The playback channel features a high performance stereo DAC ized for operation over the commercial temperature range of with independent digital volume control. 40C to +85C. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20042007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. XIN XOUT MCLKI MCLKO ILRCLK SYSCLK1 IBCLK SYSCLK2 ISDATA SYSCLK3 IAUXLRCLK IAUXBCLK IAUXSDATA DIRIN SDA SCL AD0 AD1 04756-001ADAV803 TABLE OF CONTENTS Features .............................................................................................. 1 DAC Section................................................................................ 18 Functional Block Diagram .............................................................. 1 Sample Rate Converter (SRC) Functional Overview ............ 19 Applications....................................................................................... 1 PLL Section ................................................................................. 22 General Description ......................................................................... 1 S/PDIF Transmitter and Receiver ............................................ 23 Revision History ............................................................................... 2 Serial Data Ports ......................................................................... 27 Specifications..................................................................................... 3 Interface Control ............................................................................ 30 2 Test Conditions............................................................................. 3 I C Interface ................................................................................ 30 ADAV803 Specifications ............................................................. 3 Block Reads and Writes ............................................................. 31 Timing Specifications .................................................................. 7 Register Descriptions ..................................................................... 32 Temperature Range ...................................................................... 7 Layout Considerations................................................................... 59 Absolute Maximum Ratings............................................................ 8 ADC ............................................................................................. 59 ESD Caution.................................................................................. 8 DAC.............................................................................................. 59 Pin Configuration and Function Descriptions............................. 9 PLL ............................................................................................... 59 Typical Performance Characteristics ........................................... 11 Reset and Power-Down Considerations ................................. 59 Functional Description .................................................................. 15 Outline Dimensions....................................................................... 60 ADC Section ............................................................................... 15 Ordering Guide .......................................................................... 60 REVISION HISTORY 7/07Rev. 0 to Rev. A Changes to Table 1............................................................................ 3 Changes to ADC Section............................................................... 15 Changes to Figure 25...................................................................... 15 Changes to Figure 33...................................................................... 21 Changes to SRC Architecture Section ......................................... 21 Changes to Table 7.......................................................................... 22 Changes to Figure 36...................................................................... 22 Changes to Figure 39, Figure 40, Figure 41, Figure 42 .............. 23 Changes to Transmitter Operation Section ................................ 27 Changes to Interrupts Section ...................................................... 27 Changes to Figure 50...................................................................... 28 Changes to Table 97........................................................................ 47 Changes to Table 101...................................................................... 48 Changes to Table 136 and Table 137 ............................................ 56 Updated Outline Dimensions ....................................................... 60 Changes to Ordering Guide .......................................................... 60 7/04Revision 0: Initial Version Rev. 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