Six Current Channels, One Voltage Channel, Energy Metering IC Data Sheet ADE7816 voltage and current. The device incorporates seven sigma-delta FEATURES (-) ADCs with a high accuracy energy measurement core. Measures active and reactive energy, sampled waveforms, The six current input channels allow multiple loads to be measured and current and voltage rms simultaneously. The voltage channel and the six current channels 6 current input channels and 1 voltage channel each have a complete signal path allowing for a full range of <0.1% error in active and reactive energy over a dynamic measurements. Each input channel supports a flexible gain stage range of 1000:1 and is suitable for use with current transformers (CTs). Six on- Supports current transformer and Rogowski coil sensors chip digital integrators facilitate the use of the Rogowski coil Provides instantaneous current and voltage readings sensors. Angle measurements on all 6 channels 2 kHz bandwidth operation The ADE7816 provides access to on-chip meter registers via either 2 Reference: 1.2 V (drift 10 ppm/C typical) with external the SPI or I C interface. A dedicated high speed interface, the overdrive capability high speed data capture (HSDC) port, can be used in conjunction 2 2 Flexible I C, SPI, and HSDC serial interfaces with I C to provide access to real-time ADC output information. A full range of power quality information, such as overcurrent, GENERAL DESCRIPTION overvoltage, peak, and sag detection, is accessible via the two The ADE7816 is a highly accurate, multichannel metering external interrupt pins, IRQ0 and IRQ1. device that is capable of measuring one voltage channel and up The ADE7816 energy metering IC operates from a 3.3 V supply to six current channels. It measures line voltage and current and voltage and is available in a 40-lead LFCSP that is Pb free and calculates active and reactive energy, as well as instantaneous rms RoHS compliant. FUNCTIONAL BLOCK DIAGRAM REF RESET IN/OUT DGND 4 17 6 CLKIN 27 2 PULL HIGH VRMSOS 1.2V REF ADE7816 CLKOUT 28 VGAIN 3 PULL LOW 2 VRMS X LPF VP 15 PGA2 ADC HPF VN 16 AWATTOS AWGAIN IAGAIN DIGITAL 29 IRQ0 PCF A COEFF INTEGRATOR 2 SPI/I C LPF 32 IRQ1 IAP 7 ENERGY PGA1 ADC AND RMS AVAROS AVARGAIN HPF DATA 8 36 SCLK/SCL IAN ALL COMPUTATIONAL CHANNELS BLOCK FOR 38 MOSI/SDA IBP 9 TOTAL REACTIVE POWER PGA1 ADC ENERGY AND RMS CALCULATIONS SEE 2 I C IBN 12 CHANNEL A FOR DETAILED SIGNAL PATH 37 MISO/HSD IARMSOS ICP 13 39 SS/HSA HSDC PGA1 ADC ENERGY AND RMS CALCULATIONS SEE ICN 14 CHANNEL A FOR DETAILED SIGNAL PATH 35 HSCLK 2 X IARMS LPF IDP 23 PGA3 ADC ENERGY AND RMS CALCULATIONS SEE CHANNEL A FOR DETAILED SIGNAL PATH 1 NC IEP 22 10 NC PGA3 ADC ENERGY AND RMS CALCULATIONS SEE 11 NC CHANNEL A FOR DETAILED SIGNAL PATH 20 NC 19 POR LDO LDO IFP PGA3 ADC ENERGY AND RMS CALCULATIONS SEE 21 NC IN 18 CHANNEL A FOR DETAILED SIGNAL PATH 30 NC 26 25 24 5 40 34 33 31 VDD AGND AVDD DVDD NC NC NC NC Figure 1. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 10390-001ADE7816 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Energy Offset Calibration ......................................................... 24 General Description ......................................................................... 1 Energy Phase Calibration .......................................................... 25 Functional Block Diagram .............................................................. 1 RMS Offset Calibration ............................................................. 25 Revision History ............................................................................... 2 Power Quality Features .................................................................. 26 Specif icat ions ..................................................................................... 3 Selecting a Current Channel Group ........................................ 26 Timing Characteristics ................................................................ 5 Instantaneous Waveforms ......................................................... 26 Absolute Maximum Ratings ............................................................ 8 Zero-Crossing Detection ........................................................... 26 Thermal Resistance ...................................................................... 8 Peak Detection ............................................................................ 27 ESD Caution .................................................................................. 8 Overcurrent and Overvoltage Detection ................................ 27 Pin Configuration and Function Descriptions ............................. 9 Indication of Power Direction .................................................. 28 Typical Performance Characteristics ........................................... 11 Angle Measurements ................................................................. 28 Test Circuit ...................................................................................... 14 Period Measurement .................................................................. 29 Terminology .................................................................................... 15 Voltage Sag Detection ................................................................ 29 Quick Start ....................................................................................... 16 Setting the SAGCYC Register ................................................... 29 Inputs ................................................................................................ 17 Setting the SAGLVL Register .................................................... 29 Power and Ground ..................................................................... 17 Voltage Sag Interrupt ................................................................. 29 Reference Circuit ........................................................................ 17 Checksum .................................................................................... 30 Reset ............................................................................................. 17 Layout Guidelines ........................................................................... 31 CLKIN and CLKOUT ................................................................ 18 Crystal Circuit ............................................................................ 32 Analog Inputs .............................................................................. 18 Outputs ............................................................................................ 33 Energy Measurements .................................................................... 20 Interrupts ..................................................................................... 33 Starting and Stopping the DSP ................................................. 20 Communication ......................................................................... 33 Active Energy Measurement ..................................................... 20 Registers ........................................................................................... 38 Reactive Energy Measurement ................................................. 21 Register Protection ..................................................................... 38 Line Cycle Accumulation Mode ............................................... 22 Register Format .......................................................................... 38 Root Mean Square Measurement ............................................. 23 Register Maps .............................................................................. 39 No Load Detection ..................................................................... 23 Register Descriptions ................................................................. 42 Energy Calibration ......................................................................... 24 Outline Dimensions ....................................................................... 47 Channel Matching ...................................................................... 24 Ordering Guide .......................................................................... 47 Energy Gain Calibration ............................................................ 24 REVISION HISTORY 8/2019Rev. A to Rev. B 12/2013Rev. 0 to Rev. A Deleted Crystal Equivalent Series Resistance Parameter, CLKIN Changes to EPAD Notation and Changed Pin 33 and Pin 34 Input Capacitance Parameter, and CLKOUT Output Capacitance Descriptions ....................................................................................... 9 Parameter, Table 1 ............................................................................. 4 Changes to Energy Phase Calibration Section ........................... 25 Changes to Figure 6 and Table 7 ..................................................... 9 Changes to Zero-Crossing Detection Section and Figure 33 ... 26 Changes to Figure 22 ...................................................................... 14 Changes to Indication of Power Direction Section ................... 28 Added Layout Guidelines Section and Figure 38 to Figure 40 Changes to Table 12 ....................................................................... 38 Renumbered Sequentially .............................................................. 31 Changes to Bits 7:6 Description Table 26 ................................. 43 Added Crystal Circuit Section and Figure 41 ............................. 32 Updated Outline Dimensions ............................................................. 47 2/2012Revision 0: Initial Version Changes to Ordering Guide ................................................................ 47 Rev. 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