RF PLL Frequency Synthesizers ADF4116/ADF4117/ADF4118 FEATURES GENERAL DESCRIPTION ADF4116: 550 MHz The ADF411x family of frequency synthesizers can be used to ADF4117: 1.2 GHz implement local oscillators (LO) in the upconversion and ADF4118: 3.0 GHz downconversion sections of wireless receivers and transmitters. 2.7 V to 5.5 V power supply They consist of a low noise digital phase frequency detector Separate V allows extended tuning voltage in 3 V systems P (PFD), a precision charge pump, a programmable reference Y Grade: 40C to +125C divider, programmable A and B counters, and a dual-modulus Dual-modulus prescaler prescaler (P/P + 1). The A (5-bit) and B (13-bit) counters, in ADF4116: 8/9 conjunction with the dual-modulus prescaler (P/P + 1), ADF4117/ADF4118: 32/33 implement an N divider (N = BP + A). In addition, the 14-bit 3-wire serial interface reference counter (R counter) allows selectable REFIN frequencies Digital lock detect at the PFD input. A complete phase-locked loop (PLL) can be Power-down mode implemented if the synthesizer is used with an external loop Fastlock mode filter and voltage controlled oscillator (VCO). APPLICATIONS All of the on-chip registers are controlled via a simple 3-wire interface. The devices operate with a power supply ranging Base stations for wireless radio from 2.7 V to 5.5 V and can be powered down when not in use. (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment FUNCTIONAL BLOCK DIAGRAM AV DV V DD DD P CPGND REFERENCE ADF4116/ADF4117/ADF4118 14-BIT REF IN PHASE R COUNTER FREQUENCY CHARGE CP DETECTOR PUMP 14 R COUNTER LATCH CLK 21-BIT FUNCTION DATA LOCK INPUT REGISTER LATCH 19 DETECT LE A, B COUNTER LATCH SD OUT 18 HIGH Z FROM AV FUNCTION LATCH DD 13 MUX MUXOUT N = BP + A 13-BIT B COUNTER SD OUT RF A IN LOAD PRESCALER P/P + 1 LOAD RF B IN 5-BIT A COUNTER M3 M2 M1 FL O FL O SWITCH 5 CE AGND DGND Figure 1. Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20002007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 00392-001ADF4116/ADF4117/ADF4118 TABLE OF CONTENTS Features .............................................................................................. 1 Latch Summaries........................................................................ 14 Applications....................................................................................... 1 Latch Maps .................................................................................. 15 General Description ......................................................................... 1 Function Latch................................................................................ 19 Functional Block Diagram .............................................................. 1 Counter Reset ............................................................................. 19 Revision History ............................................................................... 2 Power-Down ............................................................................... 19 Specifications..................................................................................... 3 MUXOUT Control..................................................................... 19 Timing Characteristics ................................................................ 5 Phase Detector Polarity ............................................................. 19 Absolute Maximum Ratings............................................................ 6 Charge Pump Three-State......................................................... 19 ESD Caution.................................................................................. 6 Fastlock Enable Bit..................................................................... 19 Pin Configuration and Function Descriptions............................. 7 Fastlock Mode Bit....................................................................... 19 Typical Performance Characteristics ............................................. 8 Timer Counter Control ............................................................. 19 Circuit Description......................................................................... 12 Initialization Latch ..................................................................... 20 Reference Input Section............................................................. 12 Device Programming After Initial Power-Up ........................ 20 RF Input Stage............................................................................. 12 Applications Information .............................................................. 21 Prescaler (P/P + 1)...................................................................... 12 Local Oscillator for the GSM Base Station Transmitter........ 21 A Counter and B Counter ......................................................... 12 Shutdown Circuit ....................................................................... 21 R Counter .................................................................................... 12 Direct Conversion Modulator .................................................. 21 Phase Frequency Detector (PFD) and Charge Pump............ 13 Interfacing ................................................................................... 24 MUXOUT and Lock Detect...................................................... 13 Outline Dimensions....................................................................... 25 Input Shift Register..................................................................... 13 Ordering Guide .......................................................................... 25 REVISION HISTORY 9/04Rev. A to Rev. B 4/07Rev. C to Rev. D Changes to Specifications.................................................................3 Changes to REFIN Characteristics Section..................................... 3 Changes to Ordering Guide .......................................................... 25 Changes to Table 4............................................................................ 7 Changes to Figure 35...................................................................... 22 3/01Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 25 4/00Rev. 0: Initial Version 11/05Rev. B to Rev. C Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 5 Changes to Table 3............................................................................ 6 Changes to Table 4............................................................................ 7 Changed OSC 3B1-13M0 to FOX801BH-130............................ 21 Changes to Ordering Guide .......................................................... 25 Rev. D Page 2 of 28