Integrated Synthesizer and VCO Data Sheet ADF4360-7 FEATURES GENERAL DESCRIPTION Output frequency range: 350 MHz to 1800 MHz The ADF4360-7 is an integrated integer-N synthesizer and Divide-by-2 output voltage controlled oscillator (VCO). The ADF4360-7 center 3.0 V to 3.6 V power supply frequency is set by external inductors. This allows a frequency 1.8 V logic compatibility range of between 350 MHz to 1800 MHz. In addition, a divide- Integer-N synthesizer by-2 option is available, whereby the user receives an RF output Programmable dual-modulus prescaler 8/9, 16/17 of between 175 MHz and 900 MHz. Programmable output power level 3-wire serial interface Control of all the on-chip registers is through a simple 3-wire Analog and digital lock detect interface. The device operates with a power supply ranging from Hardware and software power-down mode 3.0 V to 3.6 V and can be powered down when not in use. APPLICATIONS Wireless handsets (DECT, GSM, PCS, DCS, WCDMA) Test equipment Wireless LANs CATV equipment FUNCTIONAL BLOCK DIAGRAM AV DV R CE DD DD SET ADF4360-7 MULTIPLEXER MUXOUT 14-BIT R REF IN COUNTER LOCK MUTE DETECT CLK 24-BIT 24-BIT DATA FUNCTION DATA REGISTER LATCH CHARGE CP LE PUMP PHASE V VCO COMPARATOR V TUNE L1 L2 C C C N INTEGER REGISTER RF A OUT VCO OUTPUT CORE STAGE 13-BIT B RF B OUT COUNTER PRESCALER LOAD P/P+1 LOAD 5-BIT A COUNTER N = (BP + A) DIVSEL = 1 2 DIVSEL = 2 AGND DGND CPGND Figure 1. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no re- sponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20042018 Analog Devices, Inc. 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Technical Support www.analog.com MULTIPLEXER 04441-001ADF4360-7 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Input Shift Register .................................................................... 11 Applications ....................................................................................... 1 VCO ............................................................................................. 11 General Description ......................................................................... 1 Output Stage ................................................................................ 12 Functional Block Diagram .............................................................. 1 Latch Structure ........................................................................... 13 Revision History ............................................................................... 2 Power-Up ..................................................................................... 17 Specifications ..................................................................................... 3 Control Latch .............................................................................. 19 Timing Characteristics ..................................................................... 5 N Counter Latch ......................................................................... 20 Absolute Maximum Ratings ............................................................ 6 R Counter Latch ......................................................................... 20 Transistor Count ........................................................................... 6 Applications Information .............................................................. 21 ESD Caution .................................................................................. 6 Frequency Generator ................................................................. 21 Pin Configuration and Function Descriptions ............................. 7 Choosing the Correct Inductance Value ................................. 22 Typical Performance Characteristics ............................................. 8 Choosing the Appropriate PFD Frequency ............................ 22 Circuit Description ......................................................................... 10 Fixed Frequency LO ................................................................... 22 Reference Input Section ............................................................. 10 Interfacing ................................................................................... 23 Prescaler (P/P + 1) ...................................................................... 10 PCB Design Guidelines for Chip Scale Package........................... 23 A and B Counters ....................................................................... 10 Output Matching ........................................................................ 24 R Counter .................................................................................... 10 Outline Dimensions ....................................................................... 25 PFD and Charge Pump .............................................................. 10 Ordering Guide .......................................................................... 25 MUXOUT and Lock Detect ...................................................... 11 REVISION HISTORY 9/2018Rev. E to Rev. F 2/2012Rev. A to Rev. B Added Choosing the Appropriate PFD Frequency Section ...... 22 Changes to Figure 3 and Table 4 ...................................................... 8 Changes to Output Matching Section.......................................... 24 4/2016Rev. D to Rev. E Updated Outline Dimensions ....................................................... 25 Changed ADF4360 Family to ADF4360-7, ADSP-21xx Changes to Ordering Guide .......................................................... 25 to ADSP-2181, and EV-ADF4360-xEB1 to EV-ADF4360-7EB1Z..................................................... Throughout 11/2004Rev. 0 to Rev. A Changes to Figure 3 .......................................................................... 7 Updated Format .................................................................. Universal Updated Outline Dimensions ....................................................... 25 Changes to General Description ..................................................... 1 Changes to Ordering Guide .......................................................... 25 Changes to Specifications ................................................................. 3 Changes to the Reference Input Section...................................... 10 3/2013Rev. C to Rev. D Changes to Power-Up Section ...................................................... 17 Changes to Prescaler (P/P + 1) Section ....................................... 10 Added Table 10 ............................................................................... 17 Added Figure 22 ............................................................................. 17 11/2012Rev. B to Rev. C Updated Outline Dimensions ....................................................... 25 Changes to Table 3 ............................................................................ 6 Updated Outline Dimensions ....................................................... 25 2/2004Revision 0: Initial Version Rev. F Page 2 of 25