ADF4360-8BCPZRL7 Analog Devices

Integrated Synthesizer and VCO Data Sheet ADF4360-8 FEATURES GENERAL DESCRIPTION Output frequency range: 65 MHz to 400 MHz The ADF4360-8 is an integrated integer-N synthesizer and 3.0 V to 3.6 V power supply voltage-controlled oscillator (VCO). The ADF4360-8 center 1.8 V logic compatibility frequency is set by external inductors. This allows a frequency Integer-N synthesizer range of between 65 MHz to 400 MHz. Programmable output power level 3-wire serial interface Control of all the on-chip registers is through a simple 3-wire Digital lock detect interface. The device operates with a power supply ranging Hardware and software power-down mode from 3.0 V to 3.6 V and can be powered down when not in use. APPLICATIONS System clock generation Test equipment Wireless LANs CATV equipment FUNCTIONAL BLOCK DIAGRAM AV DV R CE DD DD SET ADF4360-8 MUXOUT MULTIPLEXER 14-BIT R REF IN COUNTER LOCK MUTE DETECT CLK 24-BIT 24-BIT DATA FUNCTION DATA REGISTER LATCH CHARGE CP LE PUMP PHASE COMPARATOR V VCO V TUNE L1 L2 C C C N RF A OUT 13-BIT B VCO OUTPUT COUNTER CORE STAGE RF B OUT N = B AGND DGND CPGND Figure 1. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no re- sponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2004-2016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 04763-001ADF4360-8 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 MUXOUT and Lock Detect ...................................................... 10 Applications ....................................................................................... 1 Input Shift Register .................................................................... 11 General Description ......................................................................... 1 VCO ............................................................................................. 11 Functional Block Diagram .............................................................. 1 Output Stage ................................................................................ 12 Revision History ............................................................................... 2 Latch Structure ........................................................................... 13 Specifications ..................................................................................... 3 Power-Up ..................................................................................... 17 Timing Characteristics ................................................................ 5 Control Latch .............................................................................. 19 Absolute Maximum Ratings ............................................................ 6 N Counter Latch ......................................................................... 20 Transistor Count ........................................................................... 6 R Counter Latch ......................................................................... 20 ESD Caution .................................................................................. 6 Applications Information .............................................................. 21 Pin Configuration and Function Descriptions ............................. 7 Choosing the Correct Inductance Value ................................. 21 Typical Performance Characteristics ............................................. 8 Fixed Frequency LO ................................................................... 21 Circuit Description ......................................................................... 10 Interfacing ................................................................................... 22 Reference Input Section ............................................................. 10 PCB Design Guidelines for Chip Scale Package........................... 22 N Counter .................................................................................... 10 Output Matching ........................................................................ 23 R Counter .................................................................................... 10 Outline Dimensions ....................................................................... 24 PFD and Charge Pump .............................................................. 10 Ordering Guide .......................................................................... 24 REVISION HISTORY Updated Outline Dimensions ....................................................... 24 5/2016Rev. C to Rev. D Changes to Ordering Guide .......................................................... 24 Changed ADF4360 Family to ADF4360-8 and ADSP-21xx to ADSP-2181 ........................................... Throughout 01/2005Rev. 0 to Rev. A Changes to Figure 3 .......................................................................... 7 Changes to Table 1 ............................................................................. 3 Updated Outline Dimensions ....................................................... 25 Changes to Table 2 ............................................................................. 5 Changes to Ordering Guide .......................................................... 25 Changes to Figure 20 ...................................................................... 12 Added Power-Up Section .............................................................. 17 11/2012Rev. B to Rev. C Deleted Power-Up Section ............................................................ 22 Changes to Table 1 ............................................................................ 4 Updated Outline Dimensions ....................................................... 24 Changes to Table 3 ............................................................................ 6 Changes to Ordering Guide .......................................................... 24 Updated Outline Dimensions ....................................................... 24 10/2004Revision 0: Initial Version 2/2012Rev. A to Rev. B Changes to Figure 3 and Table 4 ..................................................... 7 Changes to Output Matching Section .......................................... 23 Rev. D Page 2 of 24