900 MHz ISM Band Analog RF Front End Data Sheet ADF9010 FEATURES FUNCTIONAL BLOCK DIAGRAM R V AV V DV CE P X DD DD DD 840 MHz to 960 MHz ISM bands V Rx baseband analog low-pass filtering and PGA CM ADF9010 Integrated RF Tx upconverter Rx IP Integrated integer-N PLL and VCO Rx IP BB IN Rx IN Rx IN BB IN Integrated Tx PA preamplifier Rx DC OFFSET CM Differential fully balanced architectures V CORRECTION CM OVF 3.3 V supply Rx QP Rx QP Low power mode: <1 mA power-down current BB IN Rx QN Rx QN BB IN Programmable Rx LPF cutoff 24-BIT S CLK DC OFFSET INPUT SHIFT S DATA 330 kHz, 880 kHz, 1.76 MHz, and bypass CORRECTION REGISTER S LE PLL Rx PGA gain settings: 3 dB to 24 dB in 3 dB steps MUXOUT R SET R REF Low noise BiCMOS technology PHASE COUNTER IN CHARGE CP FREQUENCY PUMP N COUNTER B 48-lead, 7 mm 7 mm LFCSP DETECTOR C 1 EXT COUNTER N = BP + A C 2 EXT PRESCALER V TUNE APPLICATIONS P/P + 1 C 3 EXT A COUNTER C 4 EXT 900 MHz RFID readers C T 4 Unlicensed band 900 MHz applications LO P OUT QUADRATURE LO N PHASE SPLITTER OUT Tx IP BB Tx IN BB Tx P OUT Tx N OUT Tx QP BB Tx QN BB DGND AGND Figure 1. GENERAL DESCRIPTION The ADF9010 is a fully integrated RF Tx modulator and Rx The transmit path consists of a fully integrated differential Tx analog baseband front end that operates in the frequency direct I/Q upconverter with a high linearity PA driver amplifier. range from 840 MHz to 960 MHz. The receive path consists It converts a baseband I/Q signal to an RF carrier-based signal of a fully differential I/Q baseband PGA, low-pass filter, and between 840 MHz and 960 MHz. The highly linear transmit general signal conditioning before connecting to an Rx ADC signal path ensures low output distortion. for baseband conversion. The Rx LPF gain ranges from 3 dB Complete local oscillator (LO) signal generation is integrated to 24 dB, programmable in 3 dB steps. The Rx LPF features on chip, including the integer-N synthesizer and VCO, which four programmable modes with cutoff frequencies of 330 kHz, generate the required I and Q signals for transmit I/Q upconver- 880 kHz, and 1.76 MHz, or the filter can be bypassed if necessary. sion. The LO signal is also available at the output to drive an external RF demodulator. Control of all the on-chip registers is via a simple 3-wire serial interface. The device operates with a power supply ranging from 3.15 V to 3.45 V and can be powered down when not in use. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20082017 Analog Devices, Inc. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 07373-001ADF9010 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 R Counter .................................................................................... 12 Applications ....................................................................................... 1 A and B Counters ....................................................................... 12 Functional Block Diagram .............................................................. 1 Tx Section .................................................................................... 14 General Description ......................................................................... 1 Interfacing ................................................................................... 14 Revision History ............................................................................... 2 Latch Structure ........................................................................... 15 Specif icat ions ..................................................................................... 3 Control Latch .............................................................................. 21 Transmit Characteristics .............................................................. 3 Tx Latch ....................................................................................... 21 Receive Baseband Characteristics .............................................. 4 Rx Calibration Latch .................................................................. 21 Integer-N PLL and VCO Characteristics .................................. 5 LO Latch ...................................................................................... 22 Write Timing Characteristics ...................................................... 6 Rx Latch ....................................................................................... 22 Absolute Maximum Ratings ............................................................ 7 Initialization ................................................................................ 22 Transistor Count ........................................................................... 7 Interfacing ................................................................................... 22 ESD Caution .................................................................................. 7 Applications Information .............................................................. 23 Pin Configuration and Function Descriptions ............................. 8 Demodulator Connection ......................................................... 23 Typical Performance Characteristics ........................................... 10 LO and Tx Output Matching .................................................... 24 Circuit Description ......................................................................... 12 PCB Design Guidelines ............................................................. 24 Rx Section .................................................................................... 12 Outline Dimensions ....................................................................... 25 LO Section ................................................................................... 12 Ordering Guide .......................................................................... 25 REVISION HISTORY 12/2017Rev. 0 to Rev. A Changes to Figure 3 and Table 6 ..................................................... 8 Updated Outline Dimensions ....................................................... 25 Changes to Ordering Guide .......................................................... 25 8/2008Revision 0: Initial Version Rev. A Page 2 of 25