Low Capacitance, Low Charge Injection, 15 V/12 V iCMOS SPDT in SOT-23 ADG1219 FEATURES FUNCTIONAL BLOCK DIAGRAM <0.5 pC charge injection over full signal range ADG1219 2.5 pF off capacitance SA Low leakage 0.6 nA maximum 85C D SB 120 on resistance DECODER Fully specified at +12 V, 15 V No V supply required L 3 V logic-compatible inputs IN EN Rail-to-rail operation SWITCHES SHOWN FOR A LOGIC 0 INPUT 8-lead SOT-23 package Figure 1. APPLICATIONS Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio/video signal routing Communication systems GENERAL DESCRIPTION charge injection over the entire signal range of the device. The ADG1219 is a monolithic iCMOS device containing an iCMOS construction also ensures ultralow power dissipation, SPDT switch. An EN input is used to enable or disable the making the parts ideally suited for portable and battery- device. When disabled, all channels are switched off. When on, powered instruments. each channel conducts equally well in both directions and has an input signal range that extends to the supplies. Each switch 0.5 T = 25C exhibits break-before-make switching action. A 0.4 The iCMOS (industrial CMOS) modular manufacturing V = +15V DD 0.3 V = 15V SS process combines high voltage complementary metal-oxide 0.2 semiconductor (CMOS) and bipolar technologies. It enables the 0.1 development of a wide range of high performance analog ICs 0 capable of 33 V operation in a footprint that no other generation V = +12V DD of high voltage parts has been able to achieve. Unlike analog ICs 0.1 V = 0V SS using conventional CMOS processes, iCMOS components can 0.2 tolerate high supply voltages while providing increased perfor- 0.3 mance, dramatically lower power consumption, and reduced V = +5V DD 0.4 V = 5V SS package size. 0.5 The ultralow capacitance and exceptionally low charge injection 15 10 5 0 5 10 15 INPUT VOLTAGE (V) of these multiplexers make them ideal solutions for data acquisi- Figure 2. Charge Injection vs. Input Voltage tion and sample-and-hold applications, where low glitch and fast settling are required. Figure 2 shows that there is minimum Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20082009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CHARGE INJECTION (pC) 06575-001 06575-033ADG1219 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................6 Applications ....................................................................................... 1 ESD Caution...................................................................................6 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ..............................7 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................8 Revision History ............................................................................... 2 Test Circuits ..................................................................................... 12 Specif icat ions ..................................................................................... 3 Terminology .................................................................................... 14 Dual Supply ................................................................................... 3 Outline Dimensions ....................................................................... 15 Single Supply ................................................................................. 4 Ordering Guide .......................................................................... 15 REVISION HISTORY 3/09Rev. 0 to Rev. A Parameter, Table 1 .............. 4 Change to Power Requirements, IDD Change to Power Requirements, IDD Parameter, Table 2 .............. 5 Updated Outline Dimensions ........................................................ 15 4/08Revision 0: Initial Version Rev. A Page 2 of 16