Low Capacitance, Triple/Quad SPDT 15 V/+12 V iCMOS Switches Data Sheet ADG1233/ADG1234 FEATURES FUNCTIONAL BLOCK DIAGRAMS 1.5 pF off capacitance ADG1233 S1A 0.5 pC charge injection D1 33 V supply range S3B S1B 120 on resistance D3 Fully specified at 15 V/+12 V S3A S2B 3 V logic-compatible inputs D2 Rail-to-rail operation S2A Break-before-make switching action 16-lead TSSOP, 20-lead TSSOP, and 4 mm 4 mm LFCSP LOGIC Typical power consumption (<0.03 W) APPLICATIONS IN1 IN2 IN3 EN SWITCHES SHOWN FOR A LOGIC 1 INPUT Audio and video routing Figure 1. Automatic test equipment Data acquisition systems ADG1234 S1A S4A Battery-powered systems D1 D4 Sample-and-hold systems S1B S4B Communication systems S2B S3B D2 D3 S2A S3A LOGIC IN1 IN2 IN3 IN4 EN SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 2. GENERAL DESCRIPTION The ADG1233 and ADG1234 are monolithic iCMOS analog Unlike analog ICs using conventional CMOS processes, iCMOS switches comprising three independently selectable single-pole, components can tolerate high supply voltages while providing double throw SPDT switches and four independently selectable increased performance, dramatically lowered power consumption, SPDT switches, respectively. and reduced package size. All channels exhibit break-before-make switching action The ultralow capacitance and charge injection of these multiplexers preventing momentary shorting when switching channels. An make them ideal solutions for data acquisition and sample-and- EN hold applications, where low glitch and fast settling are required. input on the ADG1233 and ADG1234 enables or disables the device. When disabled, all channels are switched off. Fast switching speed coupled with high signal bandwidth make the devices suitable for video signal switching. iCMOS construction The iCMOS (industrial-CMOS) modular manufacturing process ensures ultralow power dissipation, making the devices ideally combines a high voltage complementary metal-oxide semi- suited for portable and battery-powered instruments. conductor (CMOS) and bipolar technologies. It enables the development of a wide range of high performance analog ICs PRODUCT HIGHLIGHTS capable of 33 V operation in a footprint that no other generation of 1. 1.5 pF off capacitance (15 V supply). high voltage devices has been able to achieve. 2. 0.5 pC charge injection. 3. 3 V logic-compatible digital input, VIH = 2.0 V, VIL = 0.8 V. 4. 16-lead TSSOP, 20-lead TSSOP, and 4 mm 4 mm LFCSP. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20062016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 05743-038 05743-001ADG1233/ADG1234 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................7 Applications ....................................................................................... 1 ESD Caution...................................................................................7 Functional Block Diagrams ............................................................. 1 Pin Configurations and Function Descriptions ............................8 General Description ......................................................................... 1 Terminology .................................................................................... 10 Product Highlights ........................................................................... 1 Typical Performance Characteristics ........................................... 11 Revision History ............................................................................... 2 Test Circuits ..................................................................................... 14 Specifications ..................................................................................... 3 Outline Dimensions ....................................................................... 16 Dual Supply ................................................................................... 3 Ordering Guide .......................................................................... 17 Single Supply ................................................................................. 5 REVISION HISTORY 8/2016Rev. C to Rev. D 8/2006Rev. 0 to Rev. A Changes to Analog Inputs Parameter and Digital Inputs Updated Format ................................................................ Universal Parameter, Table 3 ............................................................................. 7 Changes to Table 1 .......................................................................... 13 Updated Outline Dimensions ....................................................... 17 Changes to Table 2 .......................................................................... 14 Changes to Figure 11 .................................................................... 110 3/2016Rev. B to Rev. C Changes to Figure 12 .................................................................... 111 Changes to Figure 5 and Figure 6 ................................................... 9 Updated Outline Dimensions ....................................................... 17 1/2006Revision 0: Initial Version Changes to Ordering Guide .......................................................... 17 2/2009Rev. A to Rev. B Change to IDD Parameter, Table 1 ................................................... 4 Change to I Parameter, Table 2 ................................................... 6 DD Updated Outline Dimensions ....................................................... 16 Rev. D Page 2 of 17