8-Channel CMOS Logic to High Voltage Level Translator Data Sheet ADG3123 FEATURES FUNCTIONAL BLOCK DIAGRAM V 2.3 V to 5.5 V input voltage range DDA Output voltage levels (V and V to V 35 V) DDA DDB SS A1 ADG3123 Low output voltage levels: down to 24.2 V A2 6 A3 High output voltage levels: up to +35 V CHANNELS Y1 A4 Y2 Rise/fall time: 12 ns/19.5 ns typical A5 Y3 Propagation delay: 80 ns typical A6 Y4 Y5 Operating frequency: 100 kHz typical Y6 Ultralow quiescent current: 65 A typical GND 20-lead, Pb-free, TSSOP package V SS A7 APPLICATIONS Y7 2 A8 CHANNELS Y8 Low voltage to high voltage translation TFT-LCD panels Piezoelectric motor drivers V DDB Figure 1. GENERAL DESCRIPTION The ADG3123 is an 8-channel, noninverting CMOS to high The ADG3123 is guaranteed to operate over the 40C to +85C 2 voltage level translator. Fabricated on an enhanced LC MOS temperature range and is available in a compact, 20-lead TSSOP, process, the device is capable of operating at high supply Pb-free package. voltages while maintaining ultralow power consumption. PRODUCT HIGHLIGHTS The internal architecture of the device ensures compatibility with 1. Compatible with a wide range of CMOS logic levels. logic circuits running from supply voltages within the 2.3 V to 2. High output voltage levels. 5.5 V range. The voltages applied to Pin V , Pin V and DDA DDB, 3. Fast rise and fall times coupled with low propagation delay. Pin VSS set the logic levels available at the outputs on the Y side 4. Ultralow power consumption. of the device. Pin VDDA and Pin VDDB set the high output level 5. Compact, 20-lead TSSOP, RoHS-compliant package. for Pin Y1 to Pin Y6 and for Pin Y7 to Pin Y8, respectively. The VSS pin sets the low output level for all channels. The ADG3123 can provide output voltages levels down to 24.2 V for a low input level and up to +35 V for a high input logic level. For proper operation, V must always be greater than or equal to V DDB DDA and the voltage between the Pin V and Pin V should not DDB SS exceed 35 V. The low output impedance of the channels guarantees fast rise and fall times even for significant capacitive loads. This feature, combined with low propagation delay and low power consumption, makes the ADG3123 an ideal driver for TFT-LCD panel applications. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052013 Analog Devices, Inc. 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Technical Support www.analog.com 05655-001ADG3123 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications ....................................................................................... 1 Terminology .......................................................................................9 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 10 General Description ......................................................................... 1 Input Driving Requirements ..................................................... 10 Product Highlights ........................................................................... 1 Output Load Requirements ...................................................... 10 Revision History ............................................................................... 2 Power Supplies ............................................................................ 10 Specifications ..................................................................................... 3 Applications Information .............................................................. 11 Absolute Maximum Ratings ............................................................ 4 Outline Dimensions ....................................................................... 12 ESD Caution .................................................................................. 4 Ordering Guide .......................................................................... 12 Pin Configuration and Function Descriptions ............................. 5 REVISION HISTORY 1/13Rev. A to Rev. B Changes to Features Section and General Description Section ........ 1 Changes to Ordering Guide ..................................................................... 12 5/06Rev. 0 to Rev. A Changes to Features Section, General Description Section, and Product Highlights Section ............................................................. 1 Changes to Specifications ................................................................ 3 Changes to Figure 4 through Figure 9 ........................................... 6 Changes to Figure 14 and Figure 15 ............................................... 7 Changes to Theory of Operations Section and Power Supplies Section .............................................................................................. 10 9/05Revision 0: Initial Version Rev. B Page 2 of 12