Low Voltage 1.15 V to 5.5 V, Single-Channel Bidirectional Logic Level Translator ADG3301 FEATURES FUNCTIONAL BLOCK DIAGRAM Bidirectional level translation V V CCA CCY Operates from 1.15 V to 5.5 V Low quiescent current < 5 A A Y No direction pin EN APPLICATIONS ADG3301 SPI, MICROWIRE level translation GND Low voltage ASIC level translation Figure 1. Smart card readers Cell phones and cell phone cradles Portable communication devices Telecommunications equipment Network switches and routers Storage systems (SAN/NAS) Computing/server applications GPS Portable POS systems Low cost serial interfaces GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG3301 is a single-channel, bidirectional logic level 1. Bidirectional level translation. translator. It can be used in multivoltage digital system applica- 2. Fully guaranteed over the 1.15 V to 5.5 V supply range. tions such as data transfer between a low voltage DSP/controller and a higher voltage device. The internal architecture allows the 3. No direction pin. device to perform bidirectional logic level translation without an additional signal to set the direction in which the translation 4. Compact 6-lead SC70 package. takes place. The voltage applied to V sets the logic levels on the A side of CCA the device, while VCCY sets the levels on the Y side. For proper operation, VCCA must always be less than VCCY. The VCCA- compatible logic signals applied to the A pin appear as VCCY- compatible levels on the Y pin. Similarly, VCCY-compatible logic levels applied to the Y pin appear as VCCA-compatible logic levels on the A pin. The enable pin (EN) provides three-state operation on both the A pin and the Y pin. When the device enable pin is pulled low, the terminals on both sides of the device are in the high impedance state. The EN pin is referred to the VCCA supply voltage and driven high for normal operation. The ADG3301 is available in a compact 6-lead SC70 package and is guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and extended 40C to +85C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 05517-001ADG3301 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 16 Applications....................................................................................... 1 Level Translator Architecture ................................................... 16 Functional Block Diagram .............................................................. 1 Input Driving Requirements..................................................... 16 General Description ......................................................................... 1 Output Load Requirements ...................................................... 16 Product Highlights ........................................................................... 1 Enable Operation ....................................................................... 16 Specifications..................................................................................... 3 Power Supplies............................................................................ 16 Absolute Maximum Ratings............................................................ 6 Data Rate ..................................................................................... 17 ESD Caution.................................................................................. 6 Applications..................................................................................... 18 Pin Configuration and Function Descriptions............................. 7 Layout Guidelines....................................................................... 18 Typical Performance Characteristics ............................................. 8 Outline Dimensions ....................................................................... 19 Test Circuits..................................................................................... 12 Ordering Guide .......................................................................... 19 Terminology .................................................................................... 15 REVISION HISTORY 12/05Revision 0: Initial Version Rev. 0 Page 2 of 20