Fault Protection, 0.4 pC Q , INJ 8:1/Dual 4:1 Multiplexers Data Sheet ADG5208F/ADG5209F FEATURES FUNCTIONAL BLOCK DIAGRAMS Overvoltage protection up to 55 V and +55 V ADG5208F Power-off protection up to 55 V and +55 V S1 Overvoltage detection on source pins Low charge injection (Q ): 0.4 pC INJ Low on capacitance D ADG5208F: 20 pF ADG5209F: 14 pF Latch-up immune under any circumstance S8 Known state without digital inputs present V to V analog signal range 1-OF-8 SS DD DECODER 5 V to 22 V dual-supply operation 8 V to 44 V single-supply operation A0 A1 A2 EN Fully specified at 15 V, 20 V, +12 V, and +36 V Figure 1. ADG5208F Functional Block Diagram APPLICATIONS ADG5209F Analog input/output modules S1A Process control/distributed control systems DA Data acquisition S4A Instrumentation Avionics S1B Automatic test equipment DB Communication systems S4B Relay replacement 1-OF-4 DECODER A0 A1 EN Figure 2. ADG5209F Functional Block Diagram GENERAL DESCRIPTION The ADG5208F and ADG5209F are 8:1 and dual 4:1 analog Input signal levels of up to 55 V or +55 V relative to ground are multiplexers. The ADG5208F switches one of eight inputs to a blocked, in both the powered and unpowered conditions. common output, and the ADG5209F switches one of four The low capacitance and charge injection of these switches make differential inputs to a common differential output. An EN input them ideal solutions for data acquisition and sample-and-hold on both devices enables or disables the device. Each channel applications, where low glitch switching and fast settling times conducts equally well in both directions when on, and each are required. channel has an input signal range that extends to the supplies. PRODUCT HIGHLIGHTS The digital inputs are compatible with 3 V logic inputs over the 1. The source pins are protected against voltages greater than full operating supply range. the supply rails, up to 55 V and +55 V. When no power supplies are present, the channel remains in the off 2. The source pins are protected against voltages between condition, and the switch inputs are high impedance. Under normal 55 V and +55 V in an unpowered state. operating conditions, if the analog input signal levels on any Sx pin 3. Trench isolation guards against latch-up. exceed positive fault voltage (V ) or negative fault voltage (V ) DD SS 4. Optimized for low charge injection and on capacitance. by a threshold voltage (VT), the channel turns off and that Sx pin 5. The ADG5208F/ADG5209F can be operated from a dual becomes high impedance. If the fault channel is selected, the drain supply of 5 V up to 22 V or a single power supply of 8 V pin is pulled to the secondary supply voltage that was exceeded. up to 44 V. Rev. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 13035-001 13035-002ADG5208F/ADG5209F Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Test Circuits ..................................................................................... 20 Applications ....................................................................................... 1 Terminology .................................................................................... 23 Functional Block Diagrams ............................................................. 1 Theory of Operation ...................................................................... 24 General Description ......................................................................... 1 Switch Architecture .................................................................... 24 Product Highlights ........................................................................... 1 Fault Protection .......................................................................... 25 Revision History ............................................................................... 2 Applications Information .............................................................. 26 Specifications ..................................................................................... 3 Power Supply Rails ..................................................................... 26 15 V Dual Supply ....................................................................... 3 Power Supply Sequencing Protection ...................................... 26 20 V Dual Supply ....................................................................... 5 Signal Range ................................................................................ 26 12 V Single Supply ........................................................................ 7 Power Supply Recommendations ............................................. 26 36 V Single Supply ........................................................................ 9 High Voltage Surge Suppression .............................................. 26 Continuous Current per Channel, Sx, D, or Dx ..................... 11 Large Voltage, High Frequency Signals ................................... 26 Absolute Maximum Ratings .......................................................... 12 Outline Dimensions ....................................................................... 27 ESD Caution ................................................................................ 12 Ordering Guide .......................................................................... 27 Pin Configurations and Function Descriptions ......................... 13 Typical Performance Characteristics ........................................... 15 REVISION HISTORY 3/16Rev. 0 to Rev. A Added 16-Lead LFCSP ....................................................... Universal Changes to General Description Section ...................................... 1 Changes to Table 5 .......................................................................... 11 Changes to Table 6 .......................................................................... 12 Added Figure 4 Renumbered Sequentially ................................ 13 Changes to Table 7 .......................................................................... 13 Added Figure 6 ................................................................................ 14 Changes to Table 9 .......................................................................... 14 Updated Outline Dimensions ....................................................... 27 Changes to Ordering Guide .......................................................... 27 4/15Revision 0: Initial Version Rev. A Page 2 of 27