CMOS, 5 V/+5 V, 4 Dual SPST Switches Data Sheet ADG621 FEATURES FUNCTIONAL BLOCK DIAGRAM 5.5 (maximum) on resistance ADG621 0.9 (typical) on resistance flatness S1 2.7 V to 5.5 V single supply IN1 D1 2.7 V to 5.5 V dual supply D2 Rail-to-rail operation IN2 S2 10-lead MSOP package Typical power consumption: <0.01 W TTL-/CMOS-compatible inputs NOTES 1. SWITCHES SHOWN FOR A LOGIC 0 INPUT APPLICATIONS Figure 1. Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avionics Relay replacements Battery-powered systems GENERAL DESCRIPTION The ADG621 is a monolithic, CMOS, single-pole, single-throw PRODUCT HIGHLIGHTS (SPST) switch. The ADG621 conducts equally well in both 1. Low on resistance, R (4 typ ical). ON directions when on. The ADG621 contains two independent 2. Dual 2.7 V to 5.5 V or single +2.7 V to +5.5 V. switches. The ADG621 is a normally open switch. 3. Low power dissipation CMOS construction ensures low The ADG621 offers low on resistance of 4 , which is matched power dissipation. to within 0.25 between channels. The ADG621 also provides 4. Tiny 10-lead MSOP package. low power dissipation yet offers high switching speeds. All digital inputs have 0.8 V to 2.4 V logic thresholds, ensuring TTL/CMOS compatibility when using single +5 V or dual 5 V supplies. The ADG621 is available in a 10-lead MSOP package. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20012017 Analog Devices, Inc. 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Technical Support www.analog.com 02616-001ADG621 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5 Applications ....................................................................................... 1 ESD Caution...................................................................................5 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ..............................6 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................7 Product Highlights ........................................................................... 1 Test Circuits ........................................................................................9 Revision History ............................................................................... 2 Terminology .................................................................................... 11 Specifications ..................................................................................... 3 Outline Dimensions ....................................................................... 12 Dual Supply ................................................................................... 3 Ordering Guide .......................................................................... 12 Single Supply ................................................................................. 4 REVISION HISTORY 5/2017Rev. B to Rev. C Moved Terminology Section ......................................................... 11 Deleted ADG622 and ADG623 ........................................ Universal Changes to Terminology Section ................................................. 11 Changes to Features Section and General Description Section .... 1 Changes to Ordering Guide .......................................................... 12 Deleted Figure 2 and Figure 3 Renumbered Sequentially .......... 1 Deleted Break-Before-Make Time Delay Parameter, Table 1 ........ 3 11/2009Rev. A to Rev. B Deleted Note 1, Table 1 Renumbered Sequentially ..................... 3 Changes to Table 5 ............................................................................. 5 Added Note 2, Table 1 ...................................................................... 3 Changes to Ordering Guide .......................................................... 12 Deleted Break-Before-Make Time Delay Parameter, Table 2 ....... 4 Deleted Note 1, Table 2 Renumbered Sequentially ..................... 4 6/2007Rev. 0 to Rev. A Added Note 2, Table 2 ...................................................................... 4 Change to On Resistance Flatness, RFLAT(ON) Added Note 1, Table 3 Renumbered Sequentially ....................... 5 Specification (Table 1) ...................................................................... 3 Changes to Table 3 ............................................................................ 5 Change to On Resistance Flatness, RFLAT(ON) Deleted Table 5 Renumbered Sequentially................................... 5 Specification (Table 2) ...................................................................... 4 Moved Table 5 ................................................................................... 6 Added Table 6 .................................................................................... 6 Changes to Figure 2, Table 4, and Table 5 ..................................... 6 Changes to Terminology Section .................................................... 7 Changes to Figure 11, Figure 12, and Figure 13 ........................... 8 Changes to Figure 13 ......................................................................... 9 Changes to Figure 14, Figure 15, Figure 16, Figure 17, and Updated Outline Dimensions ....................................................... 12 Figure 18 ............................................................................................ 9 Changes to Ordering Guide .......................................................... 12 Changes to Figure 19 and Figure 21 ............................................. 10 Deleted Figure 20 ............................................................................ 10 11/2001Revision 0: Initial Version Rev. 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