0 Hz/DC to 13 GHz, 2.5 kV HBM ESD, SP4T, MEMS Switch with Integrated Driver Data Sheet ADGM1004 FEATURES APPLICATIONS Fully operational down to 0 Hz/dc Relay replacements On resistance: 2.9 ( maximum) Automatic test equipment (ATE): RF, digital, and mixed signals Off leakage: 0.5 nA (maximum) Load and probe boards: RF, digital, and mixed signals 3 dB bandwidth RF test instrumentation 10.8 GHz (typical) for RF1, RF4 Reconfigurable filters and attenuators 13 GHz (typical) for RF2, RF3 High performance RF switching RF performance characteristics COMPANION PRODUCTS Insertion loss: 0.45 dB (typical) at 2.5 GHz Isolation: 24 dB (typical) at 2.5 GHz Quad PMU: AD5522 IP3: 67 dBm (typical) SP4T MEMS Switch: ADGM1304 RF input power: 32 dBm (maximum) Low Noise, LDO: ADP7142, LT1962, LT3045-1 Actuation lifetime: 1 billion cycles (minimum) GENERAL DESCRIPTION Hermetically sealed switch contacts The ADGM1004 is a wideband, single-pole, four-throw (SP4T) On switching time: 75 s (maximum) switch fabricated using Analog Devices, Inc., microelectro- ESD HBM rating mechanical system (MEMS) switch technology. This technology 5 kV for RF1 to RF4 and RFC pins enables a small form factor, wide RF bandwidth, highly linear, 2.5 kV for all other pins low insertion loss switch that is operational from 0 Hz/dc to Integrated driver removes the need for an external driver 13 GHz, making it an ideal solution for a wide range of RF and Supply voltage: 3.0 V to 3.6 V precision equipment switching needs. CMOS/LVTTL compatible Parallel and SPI Interface An integrated driver chip generates a high voltage to Independently controllable switches electrostatically actuate switch that can be controlled by a parallel Switch is in an open state with no power supply present interface and a serial peripheral interface (SPI). All four switches Requirement to avoid floating nodes on all RFx pins (see the are independently controllable. Floating Node section) The device is packaged in a 24-lead, 5 mm 4 mm 1.45 mm, 5 mm 4 mm 1.45 mm, 24-lead LFCSP lead frame chip-scale package (LFCSP). Operating temperature range: 0C to +85C To ensure optimum operation of the ADGM1004, follow the Critical Operational Requirements section exactly. The on resistance (RON) performance of the ADGM1004 is affected by part to part variation, channel to channel variation, cycle actuations, settling time post turn on, bias voltage, and temperature changes. Note that throughout this data sheet, multifunction pins, such as IN1/SDI, are referred to either by the entire pin name or by a single function of the pin, for example, SDI, when only that function is relevant. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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ADGM1004 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Low Power Mode ....................................................................... 25 Applications ...................................................................................... 1 Typical Operating Circuit ......................................................... 26 Companion Products ....................................................................... 1 Applications Information ............................................................. 27 General Description ......................................................................... 1 Power Supply Rails ..................................................................... 27 Revision History ............................................................................... 2 Power Supply Recommendations ............................................ 27 Functional Block Diagram .............................................................. 4 Switchable RF Attenuator ......................................................... 27 Specifications .................................................................................... 5 Reconfigurable RF Filter ........................................................... 27 Timing Characteristics ................................................................ 7 Critical Operational Requirements .............................................. 29 Absolute Maximum Ratings ........................................................... 9 System Error Considerations Due to On-Resistance Drift .. 29 Thermal Resistance ...................................................................... 9 On Resistance Shift Due to Temperature Shock Post Actuations ................................................................................... 29 ESD Caution.................................................................................. 9 Floating Node ............................................................................. 29 Pin Configuration and Function Descriptions .......................... 10 Cumulative On Switch Lifetime ............................................... 30 Typical Performance Characteristics ........................................... 12 Handling Precautions ................................................................ 30 Test Circuits .................................................................................... 17 Register Details ............................................................................... 32 Terminology .................................................................................... 20 Switch Data Register .................................................................. 32 Theory of Operation ...................................................................... 22 Outline Dimensions ....................................................................... 33 Parallel Digital Interface ............................................................ 22 Ordering Guide .......................................................................... 33 SPI Digital Interface ................................................................... 23 Internal Oscillator Feedthrough .............................................. 25 Internal Oscillator Feedthrough Mitigation ........................... 25 REVISION HISTORY 11/2020Rev. D to Rev. E Added Timing Diagrams Section, Figure 2, Figure 3, and Added Companions Products Section .......................................... 1 Figure 4 Renumbered Sequentially ................................................ 8 Added Endnote 3, Table 1 Renumbered Sequentially ............... 5 Changes to Absolute Maximum Rating Section Changes to Figure 11 ..................................................................... 12 and Table 3 .........................................................................................9 Changes to Figure 43 ..................................................................... 19 Changes to Figure 5 and Table 5 .................................................. 10 Changes to Addressable Mode Section and Figure 45 Caption ..... 23 Changes to Typical Performance Characteristics Section ........ 12 Changes to Terminology Section ................................................. 20 Added Figure 46 Renumbered Sequentially .............................. 23 Changes to Typical Operating Circuit Section ........................... 26 Changes to Parallel Digital Interface Section and Added Power Supply Rails Section, Power Supply Table 6 Title .................................................................................... 22 Recommendations Section, Figure 51, and Table 7 Renumbered Sequentially ............................................................. 27 Added SPI Digital Interface Section, Addressable Mode Changes to System Error Considerations Due to On Resistance Section, and Figure 45 ................................................................... 23 Drift Section .................................................................................... 29 Added Daisy-Chain Mode Section, Figure 46, Figure 47, and Added On Resistance Shift Due to Temperature Shock Post Figure 48 .......................................................................................... 24 Actuations Section .......................................................................... 29 Added Hardware Reset Section and Internal Error Status Moved Figure 6 Renumbered Sequentially ................................ 29 Section .............................................................................................. 25 Changes to Internal Oscillator Feedthrough Section and 11/2019Rev. C to Rev. D Internal Oscillator Feedthrough Mitigation Section ................. 25 Change to Features Section and General Changes to Typical Operating Circuit Section and Applications Section ........................................................................ 1 Figure 49 .......................................................................................... 26 Moved Functional Block Diagram Section ................................... 4 Deleted Handling Guidelines Section, DC Voltage Range Changes to Figure 1 .......................................................................... 4 Section, and Voltage Standoff Limit Section .............................. 27 Changes to Specifications Section and Table 1 ............................ 5 Added Critical Operational Requirements Section, System Added Timing Characteristics Section and Table 2 Error Considerations Due to On-Resistance Drift Section, Renumbered Sequentially ............................................................... 7 Rev. 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