4.3 GHz, Ultrahigh Dynamic Range, Dual Differential Amplifier Data Sheet ADL5567 FEATURES FUNCTIONAL BLOCK DIAGRAM VCCx ENBL1 3 dB bandwidth of 4.3 GHz High performance (HP), low power (LP), and power down modes R F Preset 20 dB gain can be reduced by adding external resistors Channel to channel gain error: 0.04 dB at 500 MHz VON1 Channel to channel phase error: 0.6 at 500 MHz RG Differential or single-ended input to differential output VIP1 VCOM1 RG Internally dc-coupled inputs and outputs VIN1 Low noise input stage: 7.4 dB noise figure at 500 MHz Low broadband distortion for supply = 5 V, HP mode, and 2 V p-p VOP1 PM1 200 MHz: 94 dBc (HD2), 103 dBc (HD3) R F 500 MHz: 82 dBc (HD2), 82 dBc (HD3) IMD3 of 104 dBc at 200 MHz and 90 dBc at 500 MHz R F PM2 Low single-ended input distortion VON2 Slew rate: 20 V/ns Maintains low distortion for output common-mode voltage RG1 VIP2 VCOM2 down to 1.25 V RG1 VIN2 Single-supply operation: 3.3 V or 5 V Low dc power consumption: 148 mA at 5 V (HP mode), and VOP2 80 mA at 3.3 V (LP mode) R F APPLICATIONS ADL5567 Differential ADC drivers GND ENBL2 Single-ended to differential conversions RF/IF gain blocks Figure 1. SAW filter interfacing GENERAL DESCRIPTION The ADL5567 is a high performance, dual differential amplifier The quiescent current of the ADL5567 using a 5 V supply is typically 74 mA per amplifier in high performance mode. When optimized for intermediate frequencies (IF) and dc applications. The amplifier offers a low noise of 1.29 nV/Hz and excellent disabled, each amplifier consumes only 3.5 mA, and has 58 dB distortion performance over a wide frequency range, making it input to output isolation at 100 MHz. an ideal driver for high speed 16-bit analog-to-digital converters The device is optimized for wideband, low distortion, and low (ADCs). The ADL5567 is ideally suited for use in high performance noise operation, giving it unprecedented performance for overall zero-IF and complex IF receiver designs. In addition, this device spurious-free dynamic range (SFDR). These attributes, together has excellent low distortion for single-ended input driver with its adjustable gain capability, make this device the amplifier applications. of choice for driving a wide variety of ADCs, mixers, pin diode attenuators, SAW filters, and multielement discrete devices. The ADL5567 provides a gain of 20 dB. For the single-ended input configuration, the gain is reduced to 18 dB. Using two external Fabricated on an Analog Devices, Inc., high speed silicon series resistors for each amplifier expands the gain flexibility of germanium (SiGe) process, the ADL5567 is supplied in a the amplifier and allows for any gain selection from 0 dB to 20 dB compact 4 mm 4 mm, 24-lead LFCSP package and operates for a differential input and 0 dB to 18 dB for a single-ended input. over the 40C to +85C temperature. In addition, this device maintains low distortion down to output common-mode levels of 1.25 V, and therefore providing an added capability for driving CMOS ADCs at ac levels up to 2 V p-p. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20162018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 13858-001ADL5567 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 15 Applications ....................................................................................... 1 Basic Connections ...................................................................... 15 Functional Block Diagram .............................................................. 1 Input and Output Interfacing ................................................... 16 General Description ......................................................................... 1 Input and Output Equivalent Circuits ..................................... 17 Revision History ............................................................................... 2 Gain Adjustment and Interfacing ............................................ 17 Specifications ..................................................................................... 3 Effect of Load Capacitance ....................................................... 17 Absolute Maximum Ratings ............................................................ 6 ADC Interfacing ......................................................................... 18 Thermal Resistance ...................................................................... 6 Soldering Information and Recommended Land Pattern .... 20 ESD Caution .................................................................................. 6 Evaluation Board ........................................................................ 20 Pin Configuration and Function Descriptions ............................. 7 Outline Dimensions ....................................................................... 23 Typical Performance Characteristics ............................................. 8 Ordering Guide .......................................................................... 23 Theory of Operation ...................................................................... 14 REVISION HISTORY 8/2018Rev. 0 to Rev. A Changes to Gain Adjustment and Interfacing Section .............. 17 Updated Outline Dimensions ....................................................... 23 7/2016Revision 0: Initial Version Rev. A Page 2 of 23