Continuous Rate 10 Mb/s to 675 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp Data Sheet ADN2814 FEATURES GENERAL DESCRIPTION Serial data input: 10 Mb/s to 675 Mb/s The ADN2814 provides the receiver functions of quantization, Exceeds SONET requirements for jitter transfer/ signal level detect, and clock and data recovery for continuous generation/tolerance data rates from 10 Mb/s to 675 Mb/s. The ADN2814 automati- Quantizer sensitivity: 3.3 mV typical cally locks to all data rates without the need for an external Adjustable slice level: 95 mV reference clock or programming. All SONET jitter requirements Patented clock recovery architecture are met, including jitter transfer, jitter generation, and jitter Loss-of-signal (LOS) detect range: 2.3 mV to 19 mV tolerance. All specifications are quoted for 40C to +85C Independent slice level adjust and LOS detector ambient temperature, unless otherwise noted. No reference clock required Loss-of-lock indicator This device, together with a PIN diode and a TIA preamplifier, 2 I C interface to access optional features can implement a highly integrated, low cost, low power fiber Single-supply operation: 3.3 V optic receiver. Low power: 435 mW typical The receiver front-end, loss-of-signal (LOS) detector circuit 5 mm 5 mm, 32-lead LFCSP, Pb free indicates when the input signal level has fallen below a user- adjustable threshold. The LOS detect circuit has hysteresis to APPLICATIONS prevent chatter at the output. SONET OC-1/-3/-12 and all associated FEC rates The ADN2814 is available in a compact 5 mm 5 mm, ESCON, Fast Ethernet, serial digital interfaces (DTV) 32-lead LFCSP. WDM transponders Regenerators/repeaters Test equipment Broadband cross-connects and routers FUNCTIONAL BLOCK DIAGRAM REFCLKP/REFCLKN LOL CF1 CF2 VCC VEE (OPTIONAL) LOOP FREQUENCY 2 FILTER SLICEP/SLICEN DETECT PIN PHASE PHASE LOOP QUANTIZER NIN VCO SHIFTER DETECT FILTER VREF LOS DATA DETECT RE-TIMING 2 ADN2814 2 THRADJ LOS DATAOUTP/ CLKOUTP/ DATAOUTN CLKOUTN Figure 1. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20052012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 04949-001ADN2814 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Functional Description.................................................................. 16 Applications....................................................................................... 1 Frequency Acquisition............................................................... 16 General Description ......................................................................... 1 Limiting Amplifier ..................................................................... 16 Functional Block Diagram .............................................................. 1 Slice Adjust.................................................................................. 16 Revision History ............................................................................... 2 Loss-of-Signal (LOS) Detector ................................................. 16 Specifications..................................................................................... 3 Lock Detector Operation .......................................................... 17 Jitter Specifications....................................................................... 4 Harmonic Detector .................................................................... 17 Output and Timing Specifications ............................................. 5 SQUELCH Mode........................................................................ 18 2 Absolute Maximum Ratings............................................................ 6 I C Interface ................................................................................ 18 Thermal Characteristics .............................................................. 6 Reference Clock (Optional) ...................................................... 18 ESD Caution.................................................................................. 6 Applications Information .............................................................. 21 Timing Characteristics..................................................................... 7 PCB Design Guidelines ............................................................. 21 Pin Configuration and Function Descriptions............................. 8 DC-Coupled Application .......................................................... 23 Typical Performance Characteristics ............................................. 9 Coarse Data Rate Readback Look-Up Table............................... 24 2 I C Interface Timing and Internal Register Description........... 10 Outline Dimensions....................................................................... 26 Terminology .................................................................................... 12 Ordering Guide .......................................................................... 26 Jitter Specifications ......................................................................... 13 Theory of Operation ...................................................................... 14 REVISION HISTORY 3/12Rev. B to Rev. C Updated Outline Dimensions ....................................................... 26 Changes to Ordering Guide .......................................................... 26 5/10Rev. A to Rev. B Changes to Figure 5 and Table 5..................................................... 8 Changes to Figure 24...................................................................... 21 Added Exposed Pad Notation to Outline Dimensions ............. 26 3/09Rev. 0 to Rev. A Updated Outline Dimensions ....................................................... 26 Changes to Ordering Guide .......................................................... 26 9/05Revision 0: Initial Version Rev. C Page 2 of 28