X-On Electronics has gained recognition as a prominent supplier of ADRF5545ABCPZN RF Front End across the USA, India, Europe, Australia, and various other global locations. ADRF5545ABCPZN RF Front End are a product manufactured by Analog Devices. We provide cost-effective solutions for RF Front End, ensuring timely deliveries around the world.

ADRF5545ABCPZN Analog Devices

ADRF5545ABCPZN electronic component of Analog Devices
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Part No.ADRF5545ABCPZN
Manufacturer: Analog Devices
Category: RF Front End
Description: RF Front End Dual Channel 2.4 GHz to 4.2 GHz Receive
Datasheet: ADRF5545ABCPZN Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
1: USD 30.4416 ea
Line Total: USD 30.44 
Availability - 0
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0
Ship by Tue. 26 Nov to Thu. 28 Nov
MOQ : 1
Multiples : 1
1 : USD 30.4416
10 : USD 28.4004
25 : USD 26.5206
100 : USD 23.9764
250 : USD 23.2494
500 : USD 22.6921

   
Manufacturer
Product Category
RoHS - XON
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Type
Operating Frequency
Operating Supply Voltage
Maximum Operating Temperature
Mounting Style
Package / Case
NF - Noise Figure
Operating Supply Current
Technology
Brand
Gain
Development Kit
Minimum Operating Temperature
Moisture Sensitive
Oip3 - Third Order Intercept
P1db - Compression Point
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We are delighted to provide the ADRF5545ABCPZN from our RF Front End category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the ADRF5545ABCPZN and other electronic components in the RF Front End category and beyond.

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Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End Data Sheet ADRF5545A FEATURES FUNCTIONAL BLOCK DIAGRAM Integrated dual-channel RF front end ADRF5545A 2-stage LNA and high power SPDT switch On-chip bias and matching Single supply operation Gain High gain mode: 32 dB typical at 3.6 GHz Low gain mode: 16 dB typical at 3.6 GHz GND 1 30 GND GND 2 29 RXOUT-CHA Low noise figure ANT-CHA 3 28 GND GND 4 27 BP-CHA High gain mode: 1.45 dB typical at 3.6 GHz SWCTRL-CHAB 5 26 PD-CHAB SWVDD-CHAB 6 25 NIC Low gain mode: 1.45 dB typical at 3.6 GHz GND 7 24 BP-CHB ANT-CHB 8 23 GND High isolation GND 9 22 RXOUT-CHB GND 10 21 GND RXOUT-CHA and RXOUT-CHB: 47 dB typical TERM-CHA and TERM-CHB: 52 dB typical Low insertion loss: 0.65 dB typical at 3.6 GHz High power handling at T = 105C CASE Full lifetime LTE average power (9 dB PAR): 40 dBm Figure 1. Single event (<10 sec operation) LTE average power (9 dB PAR): 43 dBm High OIP3: 32 dBm typical Power-down mode and low gain mode for LNA Low supply current High gain mode: 86 mA typical at 5 V Low gain mode: 36 mA typical at 5 V Power-down mode: 12 mA typical at 5 V Positive logic control 6 mm 6 mm, 40-lead LFCSP package APPLICATIONS Wireless infrastructure TDD massive multiple input and multiple output and active antenna systems TDD-based communication systems GENERAL DESCRIPTION The ADRF5545A is a dual-channel, integrated radio frequency current of 36 mA. In power-down mode, the LNAs are turned (RF), front-end multichip module designed for time division off and the device draws 12 mA. duplexing (TDD) applications that operates from 2.4 GHz to In transmit operation, when RF inputs are connected to a 4.2 GHz. The ADRF5545A is configured in dual channels with termination pin (TERM-CHA or TERM-CHB), the switch a cascading two-stage low noise amplifier (LNA) and a high provides a low insertion loss of 0.65 dB and handles long-term power silicon single-pole, double-throw (SPDT) switch. evolution (LTE) average power (9 dB peak to average ratio In high gain mode, the cascaded two-stage LNA and switch (PAR)) of 40 dBm for full lifetime operation and 43 dBm for offer a low noise figure (NF) of 1.45 dB and a high gain of single event (<10 sec) LNA protection operation. 32 dB at 3.6 GHz with an output third-order intercept point The device comes in an RoHS compliant, compact, 6 mm (OIP3) of 32 dBm (typical). In low gain mode, one stage of the 6 mm, 40-lead LFCSP package. two-stage LNA is in bypass, providing 16 dB of gain at a lower Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20192020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. GND 11 40 GND TERM-CHA TERM-CHB 12 39 NIC 13 38 NIC GND 14 37 GND GND 15 36 GND GND 16 35 GND VDD1-CHB 17 34 VDD1-CHA NIC 18 33 NIC NIC 19 32 NIC VDD2-CHB 20 31 VDD2-CHA 20051-001ADRF5545A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Receive Operation, High Gain Mode .........................................8 Applications ...................................................................................... 1 Receive Operation, Low Gain Mode ....................................... 10 Functional Block Diagram .............................................................. 1 Transmit Operation ................................................................... 12 General Description ......................................................................... 1 Receive Operation, High Gain Mode with 2.6 GHz Tuning 13 Revision History ............................................................................... 2 Receive Operation, Low Gain Mode with 2.6 GHz Tuning . 15 Specifications .................................................................................... 3 Transmit Operation at with 2.6 GHz Tuning ........................ 17 Electrical Specifications ............................................................... 3 Theory of Operation ...................................................................... 18 2.6 GHz Tuned Operation .......................................................... 4 Signal Path Select........................................................................ 18 Absolute Maximum Ratings ........................................................... 5 Biasing Sequence ........................................................................ 18 Thermal Resistance ...................................................................... 5 Applications Information ............................................................. 19 ESD Caution.................................................................................. 5 2.6 GHz Operation ..................................................................... 19 Pin Configuration and Function Descriptions ............................ 6 Outline Dimensions ....................................................................... 20 Interface Schematics .................................................................... 7 Ordering Guide .......................................................................... 20 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 4/2020Rev. A to Rev. B Changes to Theory of Operation Section .................................... 18 Changes to Applications Information Section and Figure 47 ...... 19 5/2019Revision A: Initial Version Rev. B Page 2 of 20

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Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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