2 dB LSB, 4-Bit, Silicon Digital Attenuator, 10 MHz to 60 GHz Data Sheet ADRF5740 FEATURES FUNCTIONAL BLOCK DIAGRAM Ultrawideband frequency range: 10 MHz to 60 GHz Attenuation range: 2 dB steps to 22 dB 16 15 14 13 Low insertion loss D4 1 12 VDD 1.4 dB up to 20 GHz PARALLEL D5 2 INTERFACE 11 VSS 2.2 dB up to 44 GHz GND 3 10 GND 3.3 dB up to 55 GHz 4-BIT DIGITAL Attenuation accuracy ATTIN 4 9 ATTOUT ATTENUATOR (0.1 + 1.0% of state) up to 20 GHz 5 6 7 8 (0.2 + 3.0% of state) up to 44 GHz PACKAGE BASE (0.2 + 7.0% of state) up to 55 GHz GND Typical step error 0.30 dB up to 20 GHz Figure 1. 0.50 dB up to 44 GHz 0.60 dB up to 55 GHz High input linearity P0.1dB: 25.5 dBm typical IP3: 45 dBm typical High RF input power handling: 24 dBm average, 24 dBm peak Tight distribution in relative phase No low frequency spurious signals Parallel mode control, CMOS and LVTTL compatible RF amplitude settling time (0.1 dB of final RF output): 175 ns 16-terminal, 2.5 mm 2.5 mm, RoHS compliant LGA package APPLICATIONS Industrial scanners Test and instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs) GENERAL DESCRIPTION The ADRF5740 is a silicon, 4-bit digital attenuator with 22 dB The ADRF5740 requires a dual supply voltage of +3.3 V and attenuation control range in 2 dB steps. 3.3 V. The ADRF5740 features parallel mode control, and CMOS- and low voltage transistor to transistor logic (LVTTL)- The ADRF5740 operates from 10 MHz to 60 GHz with less than compatible controls. 3.3 dB of insertion loss and with (0.2 + 7.0% of attenuation state) of attenuation accuracy at 55 GHz. The ATTIN port of the The ADRF5740 RF ports are designed to match a characteristic ADRF5740 has an RF input power handling capability of 24 dBm impedance of 50 . T he ADRF5740 comes in a 16-terminal, average and 24 dBm peak for all states. 2.5 mm 2.5 mm, RoHS compliant, land grid array (LGA) package and operates from 40C to +105C. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 2020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. GND D3 GND D2 GND GND GND LE 20424-001ADRF5740 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Insertion Loss, Return Loss, State Error, Step Error, and Relative Phase ................................................................................7 Applications ...................................................................................... 1 Input Power Compression and Third-Order Intercept ..........9 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 10 General Description ......................................................................... 1 Power Supply .............................................................................. 10 Revision History ............................................................................... 2 RF Input and Output ................................................................. 10 Specifications .................................................................................... 3 Parallel Mode Interface ............................................................. 11 Electrical Specifications ............................................................... 3 Applications Information ............................................................. 12 Timing Specifications .................................................................. 4 Layout Considerations .............................................................. 12 Absolute Maximum Ratings ....................................................... 5 Board Layout ............................................................................... 12 Electrostatic Discharge (ESD) Ratings ...................................... 5 RF and Digital Controls ............................................................ 12 Thermal Resistance ...................................................................... 5 Packaging and Ordering Information ......................................... 13 Power Derating Curves ............................................................... 5 Outline Dimensions ................................................................... 13 ESD Caution.................................................................................. 5 Ordering Guide .......................................................................... 13 Pin Configuration and Function Descriptions ............................ 6 Interface Schematics .................................................................... 6 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 6/2020Revision 0: Initial Version Rev. 0 Page 2 of 13