High Performance, Digital Output Gyroscope Data Sheet ADXRS450 FEATURES GENERAL DESCRIPTION Complete rate gyroscope on a single chip The ADXRS450 is an angular rate sensor (gyroscope) intended 300/sec angular rate sensing for industrial, medical, instrumentation, stabilization, and other High vibration rejection over a wide frequency range high performance applications. An advanced, differential, quad Excellent 25/hour null offset stability sensor design rejects the influence of linear acceleration, enabling 2000 g powered shock survivability the ADXRS450 to operate in exceedingly harsh environments SPI digital output with 16-bit data-word where shock and vibration are present. Low noise and low power The ADXRS450 uses an internal, continuous self-test archi- 3.3 V and 5 V operation tecture. The integrity of the electromechanical system is checked 40C to +105C operation by applying a high frequency electrostatic force to the sense Ultrasmall, light, and RoHS compliant structure to generate a rate signal that can be differentiated from Two package options the baseband rate data and internally analyzed. Low cost SOIC CAV package for yaw rate (Z-axis) response The ADXRS450 is capable of sensing angular rate of up to Innovative ceramic vertical mount package, which can be 300/sec. Angular rate data is presented as a 16-bit word, as oriented for pitch, roll, or yaw response part of a 32-bit SPI message. APPLICATIONS The ADXRS450 is available in a cavity plastic 16-lead SOIC Rotation sensing medical applications (SOIC CAV) and an SMT-compatible vertical mount package Rotation sensing industrial and instrumentation (LCC V), and is capable of operating across both a wide voltage High performance platform stabilization range (3.3 V to 5 V) and temperature range (40C to +105C). FUNCTIONAL BLOCK DIAGRAM VX CP5 HIGH VOLTAGE P DD GENERATION ADXRS450 LDO REGULATOR DV DD HV DRIVE AV DD ALU CLOCK PHASE- DIVIDER LOCKED DECIMATION LOOP AMPLITUDE FILTER DETECT MOSI TEMPERATURE MISO BAND-PASS CALIBRATION SPI DEMOD ADC 12 FILTER INTERFACE SCLK CS FAULT Q FILTER Q DAQ DETECTION Z-AXIS ANGULAR RATE SENSOR DV ST SS P DAQ CONTROL P SS AV SS EEPROM Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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REGISTERS/MEMORY 08952-001ADXRS450 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Mechanical Considerations for Mounting .............................. 10 Applications ....................................................................................... 1 Applications Circuits ................................................................. 10 General Description ......................................................................... 1 ADXRS450 Signal Chain Timing ............................................. 10 Functional Block Diagram .............................................................. 1 SPI Communication Protocol ....................................................... 12 Revision History ............................................................................... 2 Command/Response ................................................................. 12 Specifications ..................................................................................... 3 SPI Communications Characteristics ...................................... 13 Absolute Maximum Ratings ............................................................ 4 SPI Applications ......................................................................... 14 Thermal Resistance ...................................................................... 4 SPI Rate Data Format ..................................................................... 19 Rate Sensitive Axis ....................................................................... 4 Memory Map and Registers .......................................................... 20 ESD Caution .................................................................................. 4 Memory Map .............................................................................. 20 Pin Configuration and Function Descriptions ............................. 5 Memory Register Definitions ................................................... 21 Typical Performance Characteristics ............................................. 7 Package Orientation and Layout Information ............................ 23 Theory of Operation ........................................................................ 9 Package Marking Codes ............................................................ 25 Continuous Self-Test .................................................................... 9 Outline Dimensions ....................................................................... 26 Applications Information .............................................................. 10 Ordering Guide .......................................................................... 27 REVISION HISTORY 5/13Rev. B to Rev. C Changes to Features Section............................................................ 1 Changed Null Accuracy from 3/sec to 6/sec......................... 3 Deleted Figure 6 from Low-Pass Filter Cut-Off (3 dB) Frequency Test Conditions/Comments and Figure 7 from ST Low-Pass Filter 3 dB Frequency Test Conditions/Comments.... 3 Changes to Figure 6, Figure 7, and Figure 11 ............................... 7 Deleted Figure 10 Renumbered Sequentially............................... 7 Deleted Figure 13 and Figure 15 ..................................................... 8 Added Figure 12 Renumbered Sequentially ................................ 8 Changes to Figure 13 and Figure 15 ............................................... 8 Deleted Calibrated Performance Section .................................... 10 Changes to Applications Circuits Section ................................... 11 Changes to Figure 25 ...................................................................... 18 Changed Heading in Table 14 to 16-Bit Rate Data .................... 19 Updated Outline Dimensions ....................................................... 26 12/11Rev. A to Rev. B Changes to the Rate Sensitive Axis Section .................................. 4 Changes to Figure 5 .......................................................................... 6 Changes to Figure 28 ...................................................................... 23 Deleted Figure 31, Renumbered Sequentially............................. 24 Changes to Back Side Terminals Notation, Figure 34 ............... 26 6/11Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 28 1/11Revision 0: Initial Version Rev. C Page 2 of 28