DEMO MANUAL DC1748A LTM2883 SPI/Digital or 2 I C Module Isolator with Adjustable 12.5V and 5V Regulated Power DESCRIPTION Demonstration circuit 1748A is a serial peripheral interface supply on V . The part generates output voltages on V , CC CC2 2 2 + bus (SPI) or inter-IC bus (I C) SPI/digital or I C Module V , and V , which may be adjusted by external program- isolator with adjustable 12.5V and 5V regulated power ming resistors. It communicates all necessary signaling featuring the LTM2883. The demo circuit features an EMI across the isolation barrier through LTCs isolator Module optimized circuit con guration and printed circuit board technology. layout. All components are integrated into the Module Design les for this circuit board are available at isolator. The demo circuit operates from a single external DEMO MANUAL DC1748A OPERATING PRINCIPLES The LTM2883 contains an isolated DC/DC conversion The demo circuit has been designed and optimized for low system, including a boost converter and inverting charge RF emissions. To this end some features of the LTM2883 pump, with multiple LDOs to deliver power to the three are not available for evaluation on the demo circuit. The output voltage rails from V . Isolation is maintained by logic supply voltage V is tied to V on the demo circuit, CC L CC the separation of GND and GND2 where signi cant operat- and the ON pin is not available on the input pin header, ing voltages and transients can exist without affecting the but may be controlled by jumper JP1. EMI mitigation operation of the LTM2883. The logic side ON pin enables techniques used include the following. or shuts down the LTM2883. All logic side signals are 1. Four layer PCB, allowing for isolated side to logic side referenced to the logic supply pin V . The LTM2883 is L bridge capacitor. The bridge capacitor is formed be- 2 available in two data bus con gurations, SPI (-S) or I C tween an inner layer of oating copper which overlaps (-I), and with two input voltage ranges, 3.0 to 3.6 volts the logic side and isolated side ground planes. This (-3) or 4.5 to 5.5 volts (-5). structure creates two series capacitors, each with SPI signaling is controlled by the logic inputs CS, SDI, approximately .008 of insulation, supporting the full and SCK. SDOE controls the SDO output and is normally dielectric withstand rating of 2500V . The bridge RMS connected to CS. The corresponding Isolated side output capacitor provides a low impedance return path for signals are CS2, SDI2, and SCK2. SDO2 is the isolated injected currents due to parasitic capacitances of the side SPI data input. All of the SPI communication channels LTM2883s signal and power isolating elements. may be used as generic digital I/O. 2. Discrete bridge capacitors (C3, C4) mounted between 2 I C signaling is controlled by the logic inputs SDA and GND2 and GND. The discrete capacitors provide ad- SCL, corresponding to SDA2 and SCL2 on the isolated ditional attenuation at frequencies below 400MHz. side. The SCL channel is unidirectional supporting master Capacitors are safety rated type Y2, manufactured by 2 mode only I C communication. SCL2 output is standard Murata, part number GA342QR7GF471KW01L. CMOS push-pull drive. SDA signaling is bidirectional, 3. Board/ground plane size has been minimized. This and includes an internal current source pull-up on SDA2 reduces the dipole antenna formed between the logic supporting up to 200pF of load capacitance. side and isolated side ground planes. Demo circuit 1748A is available in four con gurations 4. Top signal routing and ground oods have been opti- supporting all versions of the LTM2883. Table 2 details mized to reduce signal loops, minimizing differential the demo circuit con gurations. mode radiation. Table 2. 5. Common mode ltering is integrated into the input and DEMO CIRCUIT INPUT VOLTAGE COMMUNICATION output pin headers. Filtering helps to reduce emissions DC1748A-A 3.0V to 3.6V SPI/Digital caused by conducted noise and minimizes the effects DC1748A-B 4.5V to 5.5V SPI/Digital of cabling to common mode emissions. 2 DC1748A-C 3.0V to 3.6V I C 6. A combination of low ESL and high ESR decoupling is 2 DC1748A-D 4.5V to 5.5V I C used. A low ESL ceramic capacitor is located close to the module minimizing high frequency noise conduction. A high ESR tantalum capacitor is included to minimize board resonances and prevent voltage spikes due to hot plugging of the supply voltage. dc1748af 2