DEMO MANUAL DC1791A LTM2887 2 SPI/Digital or I C Module Isolator with Dual Adjustable 5V Regulators Description Demonstration circuit 1791A is a serial peripheral interface output voltages on V and V which may be adjusted CC2 L2 2 bus (SPI) or inter-IC bus (I C) Module isolator with dual by external programming resistors. It communicates all adjustable 5V regulators featuring the LTM 2887. The demo necessary signaling across the isolation barrier through circuit features an EMI optimized circuit configuration and LTCs isolator Module technology. printed circuit board layout. All components are integrated Design files for this circuit board are available at into the Module isolator. The demo circuit operates DEMO MANUAL DC1791A A SPI signaling is controlled by the logic inputs CS, SDI, structure creates two series capacitors, each with and SCK. SDOE controls the SDO output and is normally approximately .008 of insulation, supporting the full connected to CS. The corresponding isolated side output dielectric withstand rating of 2500V . The bridge RMS signals are CS2, SDI2, and SCK2. SDO2 is the isolated capacitor provides a low impedance return path for side SPI data input. All of the SPI communication channels injected currents due to parasitic capacitances of the may be used as generic digital I/O. LTM2887s signal and power isolating elements. 2 I C signaling is controlled by the logic inputs SDA and 2. Discrete bridge capacitors (C3, C4) mounted between SCL, corresponding to SDA2 and SCL2 on the isolated GND2 and GND. The discrete capacitors provide ad- side. The SCL channel is unidirectional supporting master ditional attenuation at frequencies below 400MHz. 2 mode only I C communication. SCL2 output is standard Capacitors are safety rated type Y2, manufactured by CMOS push-pull drive. SDA signaling is bidirectional, Murata, part GA342QR7GF471KW01L. and includes an internal current source pull-up on SDA2 3. Board/ground plane size has been minimized. This supporting up to 200pF of load capacitance. reduces the dipole antenna formed between the logic Demo circuit 1791A is available in four configurations side and isolated side ground planes. supporting all versions of the LTM2887. Table 1 details 4. Top signal routing and ground floods have been opti- the demo circuit configurations. mized to reduce signal loops, minimizing differential Table 1. mode radiation. DEMO CIRCUIT INPUT VOLTAGE COMMUNICATION 5. Common mode filtering is integrated into the input and DC1791A-A 3.0V to 3.6V SPI/Digital output pin headers. Filtering helps to reduce emissions DC1791A-B 4.5V to 5.5V SPI/Digital caused by conducted noise and minimizes the effects 2 DC1791A-C 3.0V to 3.6V I C of cabling to common mode emissions. 2 DC1791A-D 4.5V to 5.5V I C 6. A combination of low ESL and high ESR decoupling is The demo circuit has been designed and optimized for low used. A low ESL ceramic capacitor is located close to RF emissions. To this end some features of the LTM2887 the module minimizing high frequency noise conduction. are not available for evaluation on the demo circuit. The A high ESR tantalum capacitor is included to minimize logic supply voltage V is tied to V on the demo circuit, board resonances and prevent voltage spikes due to L CC and the ON pin is not available on the input pin header, hot plugging of the supply voltage. but may be controlled by jumper JP1. EMI mitigation EMI performance is shown in Figure 1, measured using techniques used include the following. a Gigahertz Transverse Electromagnetic (GTEM) cell and 1. Four layer PCB, allowing for isolated side to logic side method detailed in IEC 61000-4-20, Testing and Mea- bridge capacitor. The bridge capacitor is formed be- surement Techniques Emission and Immunity Testing tween an inner layer of floating copper which overlaps in Transverse Electromagnetic Waveguides. the logic side and isolated side ground planes. This dc1791afa 2 ting principles oper