QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 743 TRIPLE HIGH SPEED VIDEO AMPLIFIER LT6553 DESCRIPTION Demonstration Circuit 743 (DC743) is a Triple High Design files for this circuit board are available. Call Speed Video Amplifier featuring the LT6553. This circuit the LTC factory. is designed to demonstrate AC-coupled performance in single-supply operation. Table 1 indicates the perform- ance that is achieved with this evaluation board. Table 1. Performance Summary (T = 25C) A PARAMETER CONDITION VALUE Supply Voltage Recommended Min/Max +7V/+12V 75W to ground, ac-coupled internal Input Impedance, INR, ING, INB signals Output Impedance, OUTR, OUTG, OUTB 75W, ac-coupled CAL trace Impedance 75W nominal Outputs terminated into 75W 0dB nominal Gain Outputs terminated into High impedance +6dB nominal Bandwidth 3dB, Small Signal 7Hz-600MHz typical Worst-case All Hostile, 10MHz 75dB typical Crosstalk Worst-case All Hostile, 100MHz 50dB typical Input Signal Voltage Range 1.25V about average dc +9.0V Supply, No Output Clipping (note: feedback resistor connections tied to ground on +7V/3V dc component printed circuit) Logic Low Voltage (Amplifiers ON), DGND = 0V 0.8V On/Off Control Input Logic High Voltage (Amplifiers OFF), DGND = 0V 2.0V (5.5V max) OPERATING PRINCIPLES DC743 provides three identical channels of wideband To minimize ingress of external digital ground noise, the signal amplification suitable for driving HDTV or high- DGND logic reference input is decoupled from analog resolution RGB video display cables. Each amplifier sec- ground within the LT6553. DC743 includes a jumper, tion of the LT6553 provides a fixed gain of 2, and with JP2, which allows the DGND to be strapped to the local series back-termination at the outputs (included on the analog ground (AGND) for example, when the logic board), results in unity gain transmission of a video sig- source is floating or none is used during the evaluation. nal to a destination load. Each input is terminated to DGND may be left uncommitted with JP2 in the FLOAT analog ground to properly load the input signal cable. position. The inputs are AC-coupled on board to eliminate input Another jumper, JP1, allows the LT6553 to be forced to biasing requirements. The outputs are also AC-coupled an ENABLE condition. If JP1 is left in the EXTernal posi- to eliminate the amplifier DC bias. tion, then enabling the LT6553 is accomplished by pull- 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 743 TRIPLE HIGH SPEED VIDEO AMPLIFIER ing down the EN connection to a level near that of DGND (use the CAL connections when performing the THRU via connection to E1 or J1. A pull-up resistor internal to transmission calibration). The CAL trace has the same the LT6553 will provide a default shutdown mode of op- electrical performance and delay as the transmission eration if the control input is left open-circuit. NOTE: a lines of the three signal channels, thereby allowing cir- 30kW resistance is included on-board to protect the part cuit board and connector effects to be eliminated from from having greater than 5.5V between EN and DGND the transmission measurements. during EN disconnection refer to LT6553 datasheet for Figure 4 shows the material list of the components used application details regarding this. by DC743, and Figure 5 shows the electrical intercon- A CAL trace is also provided on DC743 to provide a nection. means of precision calibration for a Network Analyzer QUICK START PROCEDURE Demonstration Circuit 743 is easy to set up to evaluate converters, etc. in place, and using the DC743 CAL the performance of the LT6553. Refer to Figure 1 for trace as the reference 0dB path. proper measurement equipment setup and follow the 5. Energize the power supply. procedure below: 6. Connect the Network Analyzer (if used) to the appro- NOTE: Due to the Ultra High Frequencies (UHF) involved, priate channels to measure frequency response and RF measurement practices are required to accurately crosstalk as desired. Figure 2 shows a typical trans- evaluate the performance of the LT6553. mission plot. 1. Place jumpers in the following positions: 7. For video-signal evaluation, connect a component- JP1 ENABLE video signal source to the inputs and a monitor and/or video analyzer to the outputs, using equal-length ca- JP2 AGND bling amongst the three video channels. Figure 3 2. Prior to connecting the power supply, preset the out- shows a typical pulse response. put voltage to +9V, or to the desired level, if different. 8. To evaluate the shutdown mode, disconnect or relo- 3. With power off, connect the power supply to V+ and cate the JP1 jumper to the EXT position (with no con- AGND using banana-plug cables. nections made at EN, or if present, a logic high pro- vided). 4. If using a Network Analyzer, perform the THRU transmission cal with all cabling, adapters, impedance 2