EVAL-1CH2CHSOICEBZ Analog Devices

EVAL-1CH2CHSOICEBZ User Guide UG-937 One Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com Using the EVAL-1CH2CHSOICEBZ iCoupler Standard Data Isolator Evaluation Board FEATURES GENERAL DESCRIPTION Access to 2 data channels The EVAL-1CH2CHSOICEBZ supports single- and dual-channel Multiple connection options iCoupler standard data isolators in 8-lead SOIC packages. The Support for active probes evaluation board provides a JEDEC standard, 8-lead SOIC N Provisions for cable terminations and 8-lead SOIC W pad layout. This layout supports signal Support for printed circuit board (PCB) edge mounted distribution, loopback, and loads referenced to the VDDx or coaxial connectors GNDx planes, as well as optimal bypass capacitance. Signal Easy configuration sources can be conducted to the board through header pins or through edge mounted SMA connectors (SMA connectors must SUPPORTED iCoupler DEVICES be ordered separately). Screw terminal blocks on the board provide Sample iCoupler digital isolators must be ordered separately power connections. The board includes 0.2 inch header positions supported iCoupler devices are as follows: for compatibility with active probes (probe header pins must be ADuM110N ordered separately). ADuM120N/ADuM121N The evaluation board follows best PCB design practices for 4-layer ADuM210N boards, including a full power and ground plane on each side of ADuM225N/ADuM226N the isolation barrier. No other electromagnetic interference (EMI) ADuM7240/ADuM7241 or noise mitigation design features are included on this board. ADuM1200/ADuM1201 In cases of high speed operation, or when ultralow emissions are ADuM1210 required, refer to the AN-1109 Application Note for additional ADuM3200/ADuM3201 board layout techniques. ADuM3210/ADuM3211 ADuM1280/ADuM1281 PHOTOGRAPH OF THE EVALUATION BOARD Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 Page 1 of 8 14279-001UG-937 EVAL-1CH2CHSOICEBZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Connectors .....................................................................................3 Supported iCoupler Devices ........................................................... 1 Input Power ....................................................................................4 General Description ......................................................................... 1 Data Input/Output (I/O) Structures ...........................................4 Photograph of the Evaluation Board .............................................. 1 Bypass Capacitance on the PCB ..................................................4 Revision History ............................................................................... 2 High Voltage Capability ...............................................................4 Evaluation Board Circuitry ............................................................. 3 Evaluation Board Schematics and Artwork ...................................5 PCB Evaluation Goals .................................................................. 3 Bill of Materials ..................................................................................8 REVISION HISTORY 4/16Revision 0: Initial Version Rev. 0 Page 2 of 8