Single-Supply, High Speed PECL/LVPECL Comparators Data Sheet ADCMP551/ADCMP552/ADCMP553 FEATURES FUNCTIONAL BLOCK DIAGRAM HYS* Single power supply 500 ps propagation delay input to output NONINVERTING Q OUTPUT INPUT 125 ps overdrive dispersion ADCMP551/ Differential PECL/LVPECL compatible outputs ADCMP552/ ADCMP553 Differential latch control INVERTING Q OUTPUT INPUT Internal latch pull-up resistors Power supply rejection greater than 70 dB LATCH ENABLE LATCH ENABLE 700 ps minimum pulse width INPUT INPUT Equivalent input rise time bandwidth > 750 MHz *ADCMP552 ONLY Typical output rise/fall of 500 ps Figure 1. Programmable hysteresis GENERAL DESCRIPTION The ADCMP551/ADCMP552/ADCMP553 are single-supply, APPLICATIONS high speed comparators fabricated on Analog Devices, Inc., proprietary XFCB process. The devices feature a 500 ps Automatic test equipment propagation delay with less than 125 ps overdrive dispersion. High speed instrumentation Overdrive dispersion, a measure of the difference in propagation Scope and logic analyzer front ends delay under differing overdrive conditions, is a particularly Window comparators important characteristic of high speed comparators. A separate High speed line receivers programmable hysteresis pin is available on the ADCMP552. Threshold detection Peak detection A differential input stage permits consistent propagation delay High speed triggers with a common-mode range from 0.2 V to VCCI 2.0 V. Outputs Patient diagnostics are complementary digital signals and are fully compatible with Disk drive read channel detection PECL and 3.3 V LVPECL logic families. The outputs provide Hand-held test instruments sufficient drive current to directly drive transmission lines Zero crossing detectors terminated in 50 to VCCO 2 V. A latch input is included Line receivers and signal restoration and permits tracking, track-and-hold, or sample-and-hold Clock drivers modes of operation. The latch input pins contain internal pull- ups that set the latch in tracking mode when left open. The ADCMP551/ADCMP552/ADCMP553 are specified over the 40C to +85C industrial temperature range. The ADCMP551 is available in a 16-lead QSOP package the ADCMP552 is available in a 20-lead QSOP package and the ADCMP553 is available in an 8-lead MSOP package. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20042015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 04722-001ADCMP551/ADCMP552/ADCMP553 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Timing Information ....................................................................... 10 Applications ....................................................................................... 1 Applications Information .............................................................. 11 Functional Block Diagram .............................................................. 1 Clock Timing Recovery ............................................................. 11 General Description ......................................................................... 1 Optimizing High Speed Performance ..................................... 11 Revision History ............................................................................... 2 Comparator Propagation Delay Dispersion ........................... 11 Specif icat ions ..................................................................................... 3 Comparator Hysteresis .............................................................. 12 Absolute Maximum Ratings ............................................................ 5 Minimum Input Slew Rate Requirement ................................ 12 Thermal Considerations .............................................................. 5 Typical Application Circuits ......................................................... 13 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 14 Pin Configurations and Function Descriptions ........................... 6 Ordering Guide .......................................................................... 15 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 3/15Rev. A to Rev. B Changed ADCMP55x to ADCMP551/ADCMP552/ADCMP553 ..................... Throughout Changes to Table 3 ............................................................................ 6 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 6/13Rev. 0 to Rev. A Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 10/04Revision 0: Initial Version Rev. B Page 2 of 15