Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator Data Sheet ADCMP608 FEATURES FUNCTIONAL BLOCK DIAGRAM Fully specified rail to rail at V = 2.5 V to 5.5 V CC NONINVERTING + Input common-mode voltage from 0.2 V to V + 0.2 V INPUT CC Low glitch CMOS-/TTL-compatible output stage Q OUTPUT ADCMP608 40 ns propagation delay INVERTING Low power: 1 mW at 2.5 V INPUT Shutdown pin Power supply rejection > 60 dB S DN 40C to +125C operation Figure 1. APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators GENERAL DESCRIPTION The TTL-/CMOS-compatible output stage is designed to drive The ADCMP608 is a fast comparator fabricated on XFCB2, an up to 15 pF with full rated timing specifications and to degrade Analog Devices, Inc. proprietary process. This comparator is in a graceful and linear fashion as additional capacitance is exceptionally versatile and easy to use. Features include an input added. The input stage of the comparator offers robust protection range from VEE 0.2 V to VCC + 0.2 V, low noise, TTL-/CMOS- against large input overdrive, and the outputs do not phase compatible output drivers, and shutdown inputs. The device reverse when the valid input signal range is exceeded. offers 40 ns propagation delays driving a 15 pF load with 10 mV overdrive on 500 A typical supply current. The ADCMP608 is available in a tiny 6-lead SC70 package with a single-ended output and a shutdown pin. A flexible power supply scheme allows the device to operate with a single +2.5 V positive supply and a 0.2 V to + 2.7 V input signal range up to a +5.5 V positive supply with a 0.2 V to +5.7 V input signal range. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20072014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 06769-001ADCMP608 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .................................................................7 Applications ....................................................................................... 1 Power/Ground Layout and Bypassing ........................................7 Functional Block Diagram .............................................................. 1 TTL-/CMOS-Compatible Output Stage ....................................7 General Description ......................................................................... 1 Optimizing Performance ..............................................................7 Revision History ............................................................................... 2 Comparator Propagation Delay Dispersion ..................................7 Specifications ..................................................................................... 3 Crossover Bias Point .....................................................................8 Electrical Characteristics ............................................................. 3 Minimum Input Slew Rate Requirement ...................................8 Absolute Maximum Ratings ............................................................ 4 Typical Application Circuits ............................................................9 Thermal Resistance ...................................................................... 4 Outline Dimensions ....................................................................... 10 ESD Caution .................................................................................. 4 Ordering Guide .......................................................................... 10 Pin Configuration and Function Descriptions ............................. 5 Typical Performance Characteristics ............................................. 6 REVISION HISTORY 11/14Rev. A to Rev. B Changes to Figure 7 and Figure 8 ................................................... 6 6/14Rev. 0 to Rev. A Changes to Temperature Parameter, Table 2 ................................. 4 Changes to Ordering Guide .......................................................... 10 4/07Revision 0: Initial Version Rev. B Page 2 of 10