Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator Data Sheet ADCMP609 FEATURES FUNCTIONAL BLOCK DIAGRAM Fully specified rail-to-rail at V = 2.5 V to 5.5 V CC NONINVERTING Input common-mode voltage from 0.2 V to V + 0.2 V + CC INPUT Low glitch TTL-/CMOS-compatible output stage ADCMP609 Q OUTPUT 40 ns propagation delay INVERTING Low power 1 mW at 2.5 V INPUT Shutdown pin Programmable hysteresis Power supply rejection > 60 dB S DN 40C to +125C operation Figure 1. APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current/voltage controlled oscillators GENERAL DESCRIPTION The ADCMP609 is a fast comparator fabricated on XFCB2, an The TTL-/CMOS-compatible output stage is designed to drive Analog Devices, Inc., proprietary process. These comparators up to 15 pF with full rated timing specifications and to degrade are exceptionally versatile and easy to use. Features include an in a graceful and linear fashion as additional capacitance is input range from VEE 0.2 V to VCC + 0.2 V, low noise, added. The input stage of the comparator offers robust TTL-/CMOS-compatible output drivers, and adjustable protection against large input overdrive, and the outputs do not hysteresis and/or shutdown inputs. phase reverse when the valid input signal range is exceeded. A programmable hysteresis feature is also provided. The device offers 40 ns propagation delay driving a 15 pF load with 10 mV overdrive on 500 A typical supply current. The ADCMP609, available in an 8-lead MSOP package, features a shutdown pin and hysteresis control. A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a 0.2 V to +3.0 V input signal range up to a +5.5 V positive supply with a 0.2 V to +5.7 V input signal range. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20072014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 06918-001ADCMP609 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .................................................................8 Applications ....................................................................................... 1 Power/Ground Layout and Bypassing ........................................8 Functional Block Diagram .............................................................. 1 TTL-/CMOS-Compatible Output Stage ....................................8 General Description ......................................................................... 1 Optimizing Performance ..............................................................8 Revision History ............................................................................... 2 Comparator Propagation Delay Dispersion ..................................8 Specifications ..................................................................................... 3 Comparator Hysteresis .................................................................9 Electrical Characteristics ............................................................. 3 Crossover Bias Point .....................................................................9 Absolute Maximum Ratings ............................................................ 4 Minimum Input Slew Rate Requirement ................................ 10 Thermal Resistance ...................................................................... 4 Typical Applications Circuits ........................................................ 11 ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 12 Pin Configuration and Function Descriptions ............................. 5 Ordering Guide .......................................................................... 12 Typical Performance Characteristics ............................................. 6 REVISION HISTORY 11/14Rev. B to Rev. C Change to Figure 9 and Figure 10 .................................................. 7 6/14Rev. A to Rev. B Added Storage Temperature Range of 65C to +150C ............ 4 Updated Outline Dimensions ....................................................... 12 8/08Rev. 0 to Rev. A Changes to Table 4 ............................................................................ 5 Changes to Ordering Guide .......................................................... 12 7/07Revision 0: Initial Version Rev. C Page 2 of 12